Communication Between the FPGA, Real-Time Processor, and Distributed Systems

Publish Date: Jun 08, 2017 | 2 Ratings | 4.50 out of 5 | Print | Submit your review

Overview

Now run an entire system, composed of code running on the FPGA, real-time processor, and the host computer. Connectivity to the host computer can scale to other hardware devices or PCs on the network. If you have not read through or completed the first three tutorials, it is highly recommended to do so first because many fundamental tasks are described.

Download LabVIEW Evaluation Download the Sample Code

Transfer Data From the FPGA to the Real-Time Processor

1. Download the attached zip file. Open the Real-Time&FPGA Evaluation-Intertarget Communication.lvproj LabVIEW project, where your entire system’s code and hardware resources are managed. This tutorial shows you how to transfer data acquired on the FPGA to the real-time processor and then share it across a network. A user interface that runs on your development computer has been created for you.

2. Expand the Chassis project item. In the first two tutorials, you use CompactRIO in Scan Interface Mode. For this exercise, the CompactRIO is in LabVIEW FPGA Interface mode where modules are accessed through a LabVIEW FPGA program.

3. Double-click to open the FPGA.vi. On the front panel you see only a few controls and indicators. These values are made available to the real-time application, which will be discussed later in this tutorial.

4. Press <Ctrl-E> to open the block diagram. This is a simple FPGA application that sets loop timing in the first sequence and acquires two channels of temperature data in the second sequence.

5. Open RT.vi from the Project Explorer Window and switch to open the block diagram. Code has been added to the second evaluation series tutorial solution. Note the following new code that communicates with the FPGA application. First, open a reference to the FPGA VI and run the code. Then the real-time VI reads from and writes to the controls and indicators on the FPGA VI, which is a different approach than the scan mode I/O nodes accessed in the earlier tutorials. Finally, the FPGA reference is closed.

 

Communicate Between the Real-Time Application and the Windows UI

6. In the lower priority loop, the Network Comms and Network Stop network published shared variables have been added to communicate with the Windows user interface VI.

7. Finally, open Windows UI.vi, which is a simple user interface VI, to receive periodic updates from the real-time code running on the CompactRIO target. You also can use network published shared variables to periodically update other distributed targets on the network. The user can view temperature updates as well as stop the embedded application. Read the first additional resource link below for other data visualization options.


Continue your Evaluation of LabVIEW with the LabVIEW RIO Evaluation Kit


Using the evaluation kit, develop an embedded system with the LabVIEW reconfigurable I/O (RIO) architecture. Use LabVIEW software and C/C++ to program NI RIO hardware, which includes a real-time processor, FPGA, and I/O. CompactRIO uses this same architecture for prototyping through deployment with a flexible array of configuration, expansion, and C Series module I/O options.

 

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