Sensor Simulation on FPGA Hardware

Publish Date: Nov 09, 2013 | 6 Ratings | 4.33 out of 5 | Print | Submit your review

Table of Contents

  1. What’s New in LabVIEW FPGA

Automatic test systems can evaluate the functionality of measurement and control hardware by simulating real-world signals and verifying the expected response.

 

Sensor simulation is the process of providing realistic sensor signals to the inputs of a device under test (DUT) and evaluating how a piece of equipment responds across a broad range of operating conditions.

 

The greatest benefit to simulating sensors is the ability to push past the operational limits of a specific environment and test fault conditions that would otherwise be damaging or dangerous, giving your test higher coverage with lower risk. You can implement and test changes to system components without fear of destroying expensive equipment. For example, you can verify an engine control unit (ECU) without running an actual engine at high temperatures for extended periods of time. The simulated signals can range from simple analog waveforms to custom digital protocols. By taking advantage of inherent parallel processing, field-programmable gate array (FPGA) hardware provides the performance and flexibility to simultaneously simulate a variety of sensors in real time.

 

 

 

Figure 1. Running in Windows or LabVIEW Real-Time,

this host code communicates with the LVDT simulation running in the FPGA.

 

Why Use FPGAs?

 

FPGAs are ideal for sensor simulation, primarily because they can adapt to multiple sensor types with precise timing requirements. You can customize each sensor output down to nanoseconds and completely synchronize various signals to realistically create a specific state of operation. In many cases, however, sensors function independently and update at different rates. With the true parallel nature of FPGAs, dedicated blocks of silicon also can operate without any interference from other parts of the application.           

 

While the majority of sensors produce an analog signal based on their measurements, there are many sensors that convey information digitally, using methods such as pulse-width modulation or serialized protocols. An FPGA-based approach can easily integrate the processing required to generate complex digital signals as well as arbitrary analog waveforms without affecting the performance of other tasks in the application.

 

Historically, FPGA technology has been limited to hardware design engineers with in-depth knowledge of hardware description languages (HDLs). Many experts in the field of automated test equipment (ATE) or hardware-in-the-loop (HIL) testing have a limited background in FPGA development. As FPGA technology grows in popularity, the industry must give domain experts and design engineers a higher-level language for programming FPGAs. The National Instruments LabVIEW graphical programming environment has consistently brought high-performance software power to domain experts, and NI LabVIEW FPGA  is bringing hardware ability to those same engineers and scientists.

 

 

 

Figure 2. This LabVIEW FPGA code simulates both LVDT windings

based on the selectable excitationand scaling factor from the host.

 

Application Example – Simulating LVDTs

 

A linear variable differential transformer (LVDT) is a sensor that incorporates a differential transformer with a sliding magnetic core. Driven by an AC excitation source, the LVDT generates a pair of AC output signals that are modulated according to the mechanical position (displacement) of the core. The ideal output of an LVDT without signal conditioning is a scaled version of the excitation signal. This scaling factor can be positive or negative and is proportional to the distance from the mechanical middle of the device. The host computer passes the displacement in the form of a scaling factor to multiply with either the generated or real-world excitation signal. The host VI uses inputs of simulated position and desired sensitivity to calculate a scaling factor. This is passed to the FPGA through the Sim LVDT Scaling variable. Figure 1 is the graphical host interface subVI for LVDT simulation.

 

On the FPGA, you can programmatically decide whether to use internal or external excitation and pass the value through the shift register to the multiplier and bit refactoring. This applies the appropriate scaling to the signal based on the simulated displacement and finally asserts the data point to an analog output channel. The technique of passing the data to the next iteration is the graphical method of pipelining for FPGA optimization. With the new noise generator Express VI in LabVIEW 8.5, you can even add some noise to the output to give your DUT a more realistic simulation.

 

With the release of LabVIEW 8.5, you can find this LVDT example as well as other sensor simulation IP blocks at the new FPGA IPNet online. Similar to the Instrument Driver Network (ni.com/idnet)IPNet (ni.com/ipnet) is a site for searching, downloading, and even sharing FPGA IP in the form of modular functions or complete FPGA examples.

 

With sensor simulation, you can incorporate real-world signals into your test systems to simulate a broad range of operating environments. After you have verified all functionality using the simulated environment, you can connect the critical hardware under test to the actual system plant for final deployment. The flexible nature of FPGAs with true parallel operation make them ideal for simultaneously simulating multiple types of sensors. Using a higher-level programming language such as LabVIEW, you can take advantage of FPGA technology across any industry. Using commercial off-the-shelf hardware, you also can develop test systems efficiently, without prior experience in FPGA hardware design.

 

– Rick Kuhlman

Rick Kuhlman is a product manager for LabVIEW FPGA. He holds bachelor’s and master’s degrees in electrical engineering, as well as an MBA, from the University of Tennessee.

 

– Vineet Aggarwal

Vineet Aggarwal is a product manager for intelligent NI data acquisition products. He holds a bachelor’s degree in electrical engineering from The Ohio State University.

 

 

 

1. What’s New in LabVIEW FPGA

 

New features in the LabVIEW 8.5 FPGA Module  include the following:

 

LabVIEW FPGA Project Wizard – configuration-based path from splash screen to generated code for many FPGA applications

 

LabVIEW Statechart Module support – higher-level FPGA design abstraction with industry-standard statechart representation

 

New FPGA IP initiatives, including the following:

  • New Express VIs for signal generation and filtering
  • Multichannel PID and filters for better FPGA usage
  • A new site to search, download, and share LabVIEW FPGA IP at ni.com/ipnet
  • Modularity and code reuse features for building your own IP

Fixed-point math – an entirely new LabVIEW data type giving pioneer-level support for decimal point and arbitrary bit widths in LabVIEW FPGA applications

 

This article first appeared in the Q3 2007 issue of Instrumentation Newsletter.

 

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