The I2C bus is one of the most prolific communication buses in the world. Because it is used for communication and control in thousands of integrated circuits, the ability to control an I2C bus quickly is a common requirement for test systems. The I2C Digital Waveform (IDW) component provides high-level building blocks that allow a system designer to construct valid single-master, 7-bit-address I2C waveforms with custom timing and messaging, as well as examples of some simple I2C packets. These waveforms can be generated using any device that supports per-cycle tri-stating, like the NI 6547, 6548, 6551, 6552, and 6556 devices. Additionally, they support features of the 6547, 6548, 6551, 6552, and 6556 devices that make parsing a slave device's response faster and more efficient, like Hardware Compare.
Filename:
idw_1_1_1_lv86.zip
Requirements:
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Filename:
idw_1_1_1_lv82.zip
Requirements:
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Filename:
idw_1_1_1_lv85.zip
Requirements:
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The I2C bus was invented by Phillips/NXP to connect low-speed peripherals. A high-level description of the bus can be found on Wikipedia. The current specification (UM10204, I2C Bus Specification and User Manual Rev. 03) is available for download from NXP's website.
The NI I2C Digital Waveform (IDW) component installs a new library into the <user.lib> folder, called IDW.lvlib. This library contains all the API VIs, type definitions, subVIs, and polymorphic instance VIs belonging to the component. The API VIs can be placed on the diagram from the I2C Digital Waveform palette in the User Libraries function palette.
I2C Digital Waveform palette
The I2C Digital Waveform palette contains three rows of VIs. The top row contains utility functions that handle timing parameters and IDW sessions. The middle row contains high-level VIs that build segments of an I2C command. The bottom row contains low-level VIs that add an individual bit to the waveform.
The component also installs example VIs into the Example Finder. (See below.)
The IDW library allows the developer to construct valid I2C waveforms for a master node on a single-master bus. All mandatory features for a single-master configuration are implemented, including:
The following features, all of them optional, are not implemented:
1 10-bit addressing can be constructed using the low-level IDW VIs. The Add Data Byte and Add Addr Byte VIs should be studied as templates for doing so.
IDW.lvlib contains the following API functions:
Init.vi performs two functions. It coerces timing values to the generating device's sample clock and validates the coerced parameters against the desired I2C clock rate. It then creates the session cluster (I2C waveform info) that is used by the waveform component VIs.
Init.vi is polymorphic. Its default action is to preallocate memory for the I2C waveform. This greatly increases the execution speed of the waveform component VIs, but it requires a parameter for how many samples will be used in the waveform. Its alternate action, which is not to preallocate memory, circumvents this requirement at the cost of execution speed.
Close.vi closes the session by converting the I2C waveform info cluster into a digital waveform (DWDT). This DWDT can also optionally be appended to an existing DWDT.
This VI performs two functions specific to the HSDIO line of NI devices. Devices that use the NI-HSDIO driver commonly require waveforms to meet memory alignment. This is specified as a sample quantum, usually 2, 4 or 8 samples. When building the DWDT, the VI coerces the waveform's length to a multiple of the sample quantum by duplicating the last sample repeatedly. The NI 6547, 6548, 6551, 6552, and 6556 devices also feature a Hardware Compare engine that can compare sampled data to an expected waveform in real-time, making the analysis of returned slave messages much more efficient. This VI outputs a list of bits that the Hardware Compare engine will analyze, providing both their sample locations in the waveform and their type (ACK or Data).
Validate Timing.vi compares timing parameters to the requirements specified in NXP UM10204, I2C Bus Specification and User Manual Rev. 03. These parameters are found in Table 6 and Figure 27 (pp. 37-38). The values are stored in a LabVIEW Configuration File named Mode Timing.dat, found in the IDW library folder.
Add Start Condition.vi appends a Start or Repeated Start condition to the waveform. This segment must be the first section of any I2C packet, though it can appear multiple times as a Repeated Start.
Add Addr Byte.vi appends a slave address and a Read/Write bit to the waveform. The slave address is taken from the seven least significant bits (LSBs) of the Slave address input.
Add Data Byte.vi appends a byte of binary data to the waveform. The VI allows the caller to specify a bit order (MSB-first or LSB-first), though the I2C specification requires MSB-first communication in compliant packets. If a "Transmit" action is chosen, it transmits the data byte to the slave. If a "Receive" action is chosen, it compares the byte received from the slave to an expected byte.
Add Acknowledge Bit.vi appends a single bit to the waveform. If a "Send" action is chosen, it transmits either an ACK or a NACK bit. If a "Listen" action is chosen, it compares the data received from a slave device to an expected bit (ACK or NACK).
Add Stop Condition.vi appends a Stop condition to the waveform. This is usually the last segment of an I2C packet.
Add Clocked Bit.vi is a low-level function that appends a single bit to an I2C waveform. This bit follows the same timing constraints as the high-level waveform segment functions. If the bit corresponds to a data or ACK bit sent by the a slave device, the bit's type should be provided to facilitate decoding the response message with the NI 6547, 6548, 6551, 6552, and 6556 devices' Hardware Compare engine.
Interpret Data.vi is a low-level function that converts byte (or byte array) data into digital data that is compatible with the Digital Waveform Datatype (DWDT). For a "Transmit" action, it interprets [1, 0] as the drive states [Z, 0] and for a "Receive" action, it interprets [1, 0] as the compare states [H, L].
Three example VIs are installed by this component. To open them using the NI Example Finder, select "Browse by Directory Structure" and navigate to the I2C Digital Waveform folder. They can also be found at the installation path <lvdir>/examples/I2C Digital Waveform.
Because the API VIs build a waveform by appending segments to each other, they can be called in sequence to construct an I2C packet dynamically. For example, a packet that transmits one byte of data from the master to a slave at address 0x72 is shown. The waveform data is broken down into its component parts, according to the I2C specification.
A single-byte transmit packet, broken down into its components
Shown below are the VIs used to build this waveform. They are called in the exact same sequence as the waveform they construct. The Init and Close VIs are used to gather timing information and to convert the final waveform to a DWDT.
Code used to generate a single-byte transmit packet
This provides an intuitive interface for test designers, as well as a modular API that can be wrapped into higher-level functions that build custom packets for specific slave devices, needing only the transmitted or expected data and slave address as inputs.
This whitepaper explains the use of the IDW library functions in isolation. For an explanation of their use in conjunction with NI-DAQmx or NI-HSDIO based devices, refer to:
NI Systems Engineering has also created additional components for other serial protocols:
This component was created by the NI Systems Engineering group.
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We welcome discussion and feedback about this component. The I2C Digital Waveform Library thread is available on the NI Discussion Forums for questions, comments, and suggestions.