Archived: Using a Polymorphic VI to Sort Arrays of Multiple Dimensions (1-D and 2-D)

Publish Date: Apr 16, 2018 | 6 Ratings | 3.33 out of 5 | Print | Submit your review


This document has been archived and is no longer updated by National Instruments.

The Sort N Array VI is a VI that uses a polymorphic VI called Sort N Array Poly VI. A polymorphic VI is a VI that accepts different data types for a given input or output terminal. The different types of controls and indicators are mapped to subVIs that will handle a specific datatype for the polymorphic VI. Sort N Array Poly will sort either a 1-D or 2-D array depending on which one is wired into its input terminal. This polymorphic VI is composed of two subVIs. The Sort 1D Array VI handles 1-D array sorts and the Sort 2D Array VI handles the 2-D array sorts.

These two subVIs, Sort 1D Array VI and Sort 2D Array VI, have the same connector pane. However, the connector panes are not wired identically. The Sort 1D Array VI only requires two of the connector terminals, but has some unwired terminals so that it can match the connector pane of the Sort 2D Array VI. The Sort 1D Array VI connector has only the input array and the sorted array wired to the connector pane. In addition to the difference in wiring the terminals, the Sort 2D Array VI also has other controls and indicators wired to the connector pane, which are used specifically in the Sort 2D Array VI and not in the Sort 1D Array VI. When wiring in a 1-D array to the polymorphic VI, a 1D indicator is required. Do not wire any of the other terminals, even though they appear, or you will get broken wires and runtime errors, because those extra terminals are not accounted for in the 1-D connector pane. The extra terminals exist, but have nothing connected to them in the Sort 1D Array VI.

Because the Sort 2D Array VI can use these extra terminals in the polymorphic VI as those extra inputs/output are accounted for in the subVI, you must take care when changing states of the polymorphic VI.

Note: To account for the extra unassigned terminals in the Sort 1D Array VI, add the same input controls and output indicator used in the Sort 2D Array VI. Then connect the terminals of the connector pane so that it matches that of the Sort 2D Array VI. These extra controls will not be wired to anything in the block diagram of the Sort 1D Array VI. They will be there so that these controls/indicator could be wired to the Sort N Array Poly for both cases of the polymorphic input/output. This would prevent broken wires in the 1-D state as the extra controls/indicator are accounted for in corresponding Sort 1D Array subVI.

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