Digital Events Recorder in LabVIEW FPGA

Publish Date: Jan 13, 2010 | 3 Ratings | 5.00 out of 5 | Print | Submit your review

This example shows two variations on a sequence of events recorder implemented in LabVIEW with an FPGA VI and a Windows or Real-Time host VI. The events recorder monitors a number of digital input lines and detects any changes (events) on these lines. Rather than recording all lines at a specific interval, only the changes are timestamped and recorded, reducing the overall data volume that needs to be processed and recorded.

The state changed detection is implemented using the LabVIEW FPGA Module to design and run an FPGA VI on a reconfigurable I/O device. When a change is detected the line number, new state, and timestamp are written to a local buffer in memory on the FPGA. Separate code on the FPGA communicates with the host VI to transfer the buffered data back to the host, where the data can be processed and permanently stored. The timestamps are accurate to one microsecond, providing very detailed sequence information for multiple events. The data transfer to the host computer can be controlled and synchronized using interrupts or polling. Both methods are shown in different examples.

Back to Top

Bookmark & Share







Rate this document

Answered Your Question?
Yes No