Table Of Contents

USRP-2945 Front Panel, Back Panel, and LEDs

Version:
    Last Modified: July 20, 2018

    Front Panel


    Table 1. Connector Descriptions
    Connector Use
    JTAG A USB port that connects the host computer to the device FPGA for recovery purposes. This port can be used with the Xilinx iMPACT configuration tool to temporarily load a new bitfile.
    RF 0 RX1 Input terminal for the RF signal. RX1 is an SMA (f) connector with an impedance of 50 Ω and is a single-ended input channel.
    RX2 Input terminal for the RF signal. RX2 is an SMA (f) connector with an impedance of 50 Ω and is a single-ended input channel.
    AUX I/O General-purpose I/O (GPIO) port. AUX I/O is controlled by the FPGA.
    RF 1 RX1 Input terminal for the RF signal. RX1 is an SMA (f) connector with an impedance of 50 Ω and is a single-ended input channel.
    RX2 Input terminal for the RF signal. RX2 is an SMA (f) connector with an impedance of 50 Ω and is a single-ended input channel.
    spd-note-note
    Note  

    The LED indications described in the following table occur only when you use the NI-USRP API with the default API image. When you use LabVIEW FPGA, you customize the LED indications.

    Table 2. LED Indicators
    LED Description Color State Indication
    RF 0 RX1 Indicates the receive status of the module. OFF The module is not receiving.
    Green Solid The module is receiving data.
    RX2 Indicates the receive status of the module. OFF The module is not receiving.
    Green Solid The module is receiving.
    REF Indicates the status of the reference signal. OFF There is no reference signal, or the device is not locked to the reference signal.
    Green Blinking The device is not locked to the reference signal.
    Solid The device is locked to the reference signal.
    PPS Indicates the pulse per second (PPS). OFF There is no PPS timing reference signal, or the device is not locked to the reference signal.
    Green Blinking The device is locked to the PPS timing reference signal.
    GPS Indicates whether the GPSDO is locked. OFF There is no GPSDO or the GPSDO is not locked.
    Green Solid The GPSDO is locked.
    LINK Indicates the status of the link to a host computer. OFF There is no link to a host computer.
    Green, yellow, or red Solid The host is actively communicating with the device.
    RF 1 RX1 Indicates the receive status of the module. OFF The module is not active.
    Green Solid The module is receiving data.
    RX2 Indicates the receive status of the module. OFF The module is not receiving.
    Green Solid The module is receiving.

    Back Panel


    Table 3. Connector Descriptions
    Connector Use
    PWR Input that accepts a 9 V to 16 V, 6 A external DC power connector.
    1G/10G ETH Two SFP+ input terminals used for 1G ETH or 10G ETH connectivity with the host driver. Not currently supported in LabVIEW FPGA.
    LO OUT 1 IF2 Output terminal for the IF LO signal exported by RF 1. LO OUT 1 IF2 is a female SMA connector with an impedance of 50 Ω.
    LO OUT 1 IF1 Output terminal for the RF LO signal exported by RF 1. LO OUT 1 IF1 is a female SMA connector with an impedance of 50 Ω.
    REF OUT Output terminal for an external reference signal for the LO on the device. REF OUT is a female SMA connector with an impedance of 50 Ω, and it is a single-ended reference output. The output signal at this connector is 10 MHz at 3.3 V.
    REF IN Input terminal for an external reference signal for the LO on the device. REF IN is a female SMA connector with an impedance of 50 Ω, and it is a single-ended reference input. REF IN accepts a 10 MHz signal with a minimum input power of 0 dBm (0.632 Vpk-pk) and a maximum input power of 15 dBm (3.56 Vpk-pk) for a square wave or sine wave.
    LO IN 0 IF2 Terminal for an external signal to the IF LO input on the RF 0 daughterboard. This signal can be used as the LO source for an RF 0 channel by selecting external on that channel's LO source setting. LO IN 0 IF2 is a female SMA connector with an impedance of 50 Ω.
    LO IN 0 IF1 Terminal for an external signal to the IF LO input on the RF 0 daughterboard. This signal can be used as the LO source for an RF 0 channel by selecting external on that channel's LO source setting. LO IN 0 IF1 is a female SMA connector with an impedance of 50 Ω.
    PCIe x4 Port for a PCI Express Generation 1, x4 bus connection through an MXI Express four-lane cable.
    LO IN 1 IF2 Terminal for an external signal to the IF LO input on the RF 0 daughterboard. This signal can be used as the LO source for an RF 0 channel by selecting external on that channel's LO source setting. LO IN 1 IF2 is a female SMA connector with an impedance of 50 Ω.
    LO IN 1 IF1 Terminal for an external signal to the IF LO input on the RF 0 daughterboard. This signal can be used as the LO source for an RF 0 channel by selecting external on that channel's LO source setting. LO IN 1 IF1 is a female SMA connector with an impedance of 50 Ω.
    PPS TRIG OUT Output terminal for the pulse per second (PPS) timing reference. PPS TRIG OUT is a female SMA connector with an impedance of 50 Ω, and it is a single-ended input. The output signal is 0 V to 3.3 V TTL. You can also use this port as triggered output (TRIG OUT) that you program with the PPS Trig Out I/O signal.
    PPS TRIG IN Input terminal for pulse per second (PPS) timing reference. PPS TRIG IN is a female SMA connector with an impedance of 50 Ω, and it is a single-ended input channel. PPS TRIG IN accepts 0 V to 3.3 V TTL and 0 V to 5 V TTL signals. You can also use this port as a triggered input (TRIG IN) that you control using NI-USRP.
    GPS ANT Input terminal for the GPS antenna signal. GPS ANT is a female SMA connector with a maximum input power of -15 dBm and an output of DC 5 V to power an active antenna.
    spd-note-notice
    Notice  

    Do not terminate the GPS ANT port if you do not use it.


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