Table Of Contents

NI-5782 Single-Sample CLIP I/O Reference

Version:
    Last Modified: April 24, 2017

    CLIP Signal Name Data Type Control/Indicator Description
    CLK200 You must select a 200 MHz clock in the Clock Selections category of the IO Module Properties dialog box for proper CLIP functionality.
    CLK40 You must select a 40 MHz clock in the Clock Selections category of the IO Module Properties dialog box for proper CLIP functionality. The User Command and SPI signals should be accessed only in this clock domain.
    Data Clock FPGA clock used to sample analog input and output data.
    Data Clock Div 2 FPGA clock used to sample analog input and output data. This clock runs at half the rate of Data Clock.
    SPI Idle Boolean Indicator Indicates when the SPI interface to either the clock circuit or ADC is being accessed.

    To use the SPI or Apply Settings signals, you must wait for this signal to be TRUE.

    SPI Device U8 Control Selects which SPI device to interact with.
    • 1 = AO DAC
    • 2 = AD9512 Clocking
    • 3 = Bias DAC 0
    • 4 = Bias DAC 1
    • 5 = Bias DAC 2
    • 6 = Bias DAC 3
    SPI Address U16 Control Configures the SPI address to read and write data.

    Write data only to addresses supported by the selected device.

    SPI Read Data U8 Indicator Configures the SPI data to read from a selected device at a SPI address.
    SPI Write Data U16 Control Configures the SPI data to write to a selected device at a SPI address.
    SPI Read Boolean Control Executes the settings of the SPI Read Data signal when this signal is on a FALSE-to-TRUE transition.
    SPI Write Boolean Control Executes the settings of the SPI Write Data signal when this signal is on a FALSE-to-TRUE transition.
    User Command U8 Control Configures the clocking, ADC, sampling, and other settings for your device.

    Use this signal in conjunction with the User Data 0 and User Data 1 signals to select values for these settings. Apply these settings by selecting the User Command Commit signal.

    Refer to the User Command Reference for information about values for this signal.

    User Command Commit Boolean Control Applies the settings configured with the User Command signal.
    User Command Idle Boolean Indicator Indicates whether the device is prepared to accept more commands from the User Command signal.
    • TRUE: The device is prepared to accept more commands from the User Command signal.
    • FALSE: The device is not prepared to accept more commands.
    User Data 0 U8 Control Specifies configuration for the command in the User Command signal.

    Use the User Command, User Data 0, and User Data 1 signals to configure your device.

    Refer to the User Command Reference for information about values for this signal.

    User Data 1 U8 Control Specifies configuration for the command in the User Command signal.

    Use the User Command, User Data 0, and User Data 1 signals to configure your device.

    Refer to the User Command Reference for information about values for this signal.

    User Command Status U8 Indicator Indicates whether the previous command completed successfully.
    • 0 = Successful
    • 1 = Command does not exist
    • 2 = Option does not exist
    User Return U16 Indicator Returns data configured by the User Command signal.
    User Error U8 Indicator Indicates that an error occurred and you must reinitialize the device.
    • 0 = No error
    • Nonzero = Error
    AI 0 I16 Indicator Reads analog data from the adapter module.

    Each sample is a left-justified I16 data type.

    If AI 1 is configured for TIS mode, these signals return time-interleaved samples for AI 1.

    AI 1 I16 Indicator Reads analog data from the adapter module.

    Each sample is a left-justified I16 data type.

    If AI 1 is configured for TIS mode, these signals return time-interleaved samples for AI 1.

    AO 0 N-1 I16 Control Sends analog data to the adapter module.

    Each sample is an I16 data type.

    AO 0 N I16 Control Sends analog data to the adapter module.

    Each sample is an I16 data type.

    AO 1 N-1 I16 Control Sends analog data to the adapter module.

    Each sample is an I16 data type.

    AO 1 N I16 Control Sends analog data to the adapter module.

    Each sample is an I16 data type.

    AO Disable Boolean Control Disables data output on AO 0 and AO 1.
    Trigger Input Boolean Indicator Indicates whether the FPGA received an unclocked trigger signal from the TRIG front panel connector.
    • TRUE: The FPGA has received a trigger signal.
    • FALSE: The FPGA has not received a trigger signal.
    PFI 0 Rd Data[1] Boolean Indicator Reads data through the AUX I/O connector on the PFI line.
    PFI 0 Wr Data[1] Boolean Control Writes data through the AUX I/O connector on the PFI line.
    PFI 0 WE[1] Boolean Control Configures the PFI line on the AUX I/O connector for reading or writing.
    • TRUE: Writing enabled.
    • FALSE: Reading enabled (output tristated).
    PFI 1 Rd Data[1] Boolean Indicator Reads data through the AUX I/O connector on the PFI line.
    PFI 1 Wr Data[1] Boolean Control Writes data through the AUX I/O connector on the PFI line.
    PFI 1 WE[1] Boolean Control Configures the PFI line on the AUX I/O connector for reading or writing.
    • TRUE: Writing enabled.
    • FALSE: Reading enabled (output tristated).
    PFI 2 Rd Data[1] Boolean Indicator Reads data through the AUX I/O connector on the PFI line.
    PFI 2 Wr Data[1] Boolean Control Writes data through the AUX I/O connector on the PFI line.
    PFI 2 WE[1] Boolean Control Configures the PFI line on the AUX I/O connector for reading or writing.
    • TRUE: Writing enabled.
    • FALSE: Reading enabled (output tristated).
    PFI 3 Rd Data[1] Boolean Indicator Reads data through the AUX I/O connector on the PFI line.
    PFI 3 Wr Data[1] Boolean Control Writes data through the AUX I/O connector on the PFI line.
    PFI 3 WE[1] Boolean Control Configures the PFI line on the AUX I/O connector for reading or writing.
    • TRUE: Writing enabled.
    • FALSE: Reading enabled (output tristated).
    DIO Port 0 Rd Data[1] U8 Indicator Reads data through the AUX I/O connector on the DIO port channels <0..3>.

    For example, for DIO Port 0, bit 0 corresponds with DIO Port (0), bit 1 corresponds with DIO Port (1), and so on. The upper four bits of the U8 are unused.

    DIO Port 0 Wr Data[1] U8 Control Writes data through the AUX I/O connector on the DIO port channels <0..3>.

    For example, for DIO Port 0, bit 0 corresponds with DIO Port (0), bit 1 corresponds with DIO Port (1), and so on. The upper four bits of the U8 are unused.

    DIO Port 0 WE Request[1] Boolean Configures the DIO port channels <0..3> on the AUX I/O connector for reading or writing.
    • TRUE: Writing enabled.
    • FALSE: Reading enabled (output tristated).
    DIO Port 0 WE Actual[1]
    DIO Port 1 Rd Data[1] U8 Indicator Reads data through the AUX I/O connector on the DIO port channels <0..3>.

    For example, for DIO Port 0, bit 0 corresponds with DIO Port (0), bit 1 corresponds with DIO Port (1), and so on. The upper four bits of the U8 are unused.

    DIO Port 1 Wr Data[1] U8 Control Writes data through the AUX I/O connector on the DIO port channels <0..3>.

    For example, for DIO Port 0, bit 0 corresponds with DIO Port (0), bit 1 corresponds with DIO Port (1), and so on. The upper four bits of the U8 are unused.

    DIO Port 1 WE Request[1] Boolean Control Configures the DIO port channels <0..3> on the AUX I/O connector for reading or writing.
    • TRUE: Writing enabled.
    • FALSE: Reading enabled (output tristated).
    DIO Port 1 WE Actual[1]
    PLL Locked Boolean Indicator

    Indicates whether the phase-locked loop (PLL) is locked.

    This signal is valid only when using a Reference Clock, either through the CLK IN connector or through the Sync Clock or IoModSyncClock.

    • TRUE: The PLL is locked.
    • FALSE: The PLL is not locked or you are not using a Reference Clock.
    Initialization Done Bool Indicator Indicates whether the device is ready to use.
    • TRUE: The device is ready to use after the CLIP runs an initial default setup. The sampled data is valid.
    • FALSE: The device is not ready.
    • 1 All DIO and PFI signals can be accessed in any clock domain, but you must comply with the physical clock capabilities of your device.

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