The Sample Clock signals when the DAC converts the digital waveform values to an analog voltage. The PXIe-5433 can derive a Sample Clock from its main internal timing source, the onboard Sample Clock Timebase. The PXIe-5433 uses a high-precision 100 MHz voltage-controlled crystal oscillator (VCXO) clock source for the Sample Clock Timebase.
The Sample Clock Timebase frequency is tuned by an internal calibration DAC control voltage when the Reference Clock Source property or the NIFGEN_ATTR_REFERENCE_CLOCK_SOURCE attribute is set to None. The internal calibration DAC, which is calibrated at the factory and which you also can calibrate, tunes the Sample Clock Timebase to maintain a high quality frequency source.
The PXIe-5433 only supports High-Resolution clock mode and does not support external Sample Clock sources.
The PXIe-5433 uses either the onboard Reference Clock, a temperature-compensated crystal oscillator (TCXO), or the PXIe_CLK100 backplane line as the Reference Clock source. The source provides the control voltage that tunes the VCXO of the Sample Clock Timebase to match the frequency stability and accuracy of the Reference Clock source for internal clock update sources, using a phase-locked loop (PLL).
To begin the PLL, the phase comparator compares the selected Reference Clock to the 100 MHz clock of the Sample Clock Timebase. Next, a control voltage proportional to the phase difference between the two clocks is developed and used to tune the Sample Clock Timebase into alignment with the Reference Clock. Finally, the Sample Clock Timebase output is routed back to the phase comparator, and the loop is closed.