Table Of Contents

PXIe-5185 Specifications

Version:
    Last Modified: February 24, 2017

    Definitions

    Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.

    Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.

    • Typical specifications describe the expected performance met by a majority of the models.
    • Nominal specifications describe parameters and attributes that may be useful in operation.

    Conditions

    Specifications are valid under the following conditions unless otherwise noted.

    • For 50 Ω input channel, vertical range (Vpk-pk) set to 0.11, 0.2, 0.5, or 1
    • For 50 Ω input channel, vertical range (Vpk-pk) set to 0.11, 0.2, 0.5, 1, 2, 5, or 10
    • 1 MΩ input channel disconnected for 50 Ω input channel specifications, and 50 Ω input channel disconnected for 1 MΩ input channel specifications
    • Sample clock set to 6.25 GS/s or 12.5 GS/s
    • Onboard Sample clock locked to PXIe_CLK100 Reference clock
    • 0 °C to 50 °C ambient temperature
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    Note  

    Early versions of the PXIe-5185 only support 50 Ω input impedance. Later versions support both 50 Ω and 50 Ω input impedance. To verify input impedances supported by your device, compare your device front panel with the diagrams at the end of this document. You can also check the device part number:

    • PXIe-5185 module part numbers 199363x-0zL (where x is any letter and z is any number) only support 50 Ω input impedance.
    • PXIe-5185 module part numbers 152962x-0zL (where x is any letter and z is any number) support both 50 Ω and 1 MΩ input impedance

    Warranted specifications are valid under the following conditions unless otherwise noted.

    • The PXIe-5185 is warmed up for 25 minutes at ambient temperature
    • Self-calibration is completed after warm-up period or when switching from an external Sample and/or Reference clock to the Onboard clock
    • Calibration cycle is maintained
    • The PXI Express chassis fan speed is set to HIGH, the fan filters are clean if present, and the empty slots contain PXI chassis slot blockers and filler panels. For more information about cooling, refer to the Maintain Forced-Air Cooling Note to Users document available at ni.com/manuals.
    • NI-SCOPE 3.9.6 or later instrument driver is used
    • External calibration is performed at 23 °C ± 3 °C

    Vertical

    Analog Input (Channel 0 and Channel 1)

    Number of channels

    Two (simultaneously sampled)

    Input type

    Reference single-ended

    Connectors

    CH 0, 50 Ω

    SMA

    CH 1, 50 Ω

    SMA

    CH 0, 1 MΩ

    BNC

    CH 1, 1 MΩ

    BNC

    Impedance and Coupling

    Input impedance, typical

    50 Ω

    50 Ω ± 1.5%

    1 MΩ

    1 MΩ ± 1.0% in parallel with a characteristic capacitance of 10 pF

    Input coupling

    50 Ω

    DC

    1 MΩ

    AC, DC; software-selectable

    Voltage standing wave ratio (VSWR), characteristic[1]

    ≥DC to ≤1 GHz

    1.25:1

    >1 GHz to ≤5 GHz

    1.8:1

    Figure 1. 50 Ω Input VSWR and Input Return Loss

    Voltage Levels

    Table 1. Full Scale (FS) Input Range and Programmable Vertical Offset
    Input Input range (Vpk-pk) Vertical offset range (V)
    50 Ω and 1 MΩ inputs 0.11 to 1 in >0.3 mV steps ±0.25
    1 MΩ input only >1 to 10 in >3 mV steps ±2.5
    Maximum input overload, characteristic[2]

    50 Ω

    |Peaks| ≤ 1 V

    1 MΩ

    |Peaks| ≤ 42 V

    Accuracy

    Resolution

    8 bits

    DC accuracy (programmable vertical offset = 0 Volts), warranted[3]

    50 Ω

    ±(2% of input + 0.35% of FS + 0.7 mV)

    1 MΩ

    ±(2% of input + 0.9% of FS + 1.3 mV)

    Programmable vertical offset accuracy, warranted[3]

    ±1.2% of offset setting

    DC drift, characteristic[4]

    50 Ω

    ±(0.23% of input + 0.03% of FS) per °C

    1 MΩ

    ±(0.23% of input + 0.1% FS + 0.2 mV) per °C

    Programmable vertical offset drift, characteristic[4]

    ±0.02% of offset setting per ºC

    AC amplitude accuracy, warranted[3]

    50 Ω

    ±0.35 dB at 50 kHz

    1 MΩ

    ±0.5 dB at 50 kHz

    AC amplitude drift, characteristic[4]

    ±0.014 dB per ºC at 50 kHz

    Crosstalk (CH 0 to/from CH 1), characteristic[5]
    50 Ω

    ≥DC to ≤1 GHz

    –68 dB

    >1 GHz to ≤2.5 GHz

    –60 dB

    >2.5 GHz to ≤5 GHz

    –47 dB

    1 MΩ: ≥DC to ≤300 MHz

    –62 dB

    Bandwidth and Transient Response

    Bandwidth (-3 dB)[6]

    50 Ω, warranted

    3 GHz, warranted

    1 MΩ[7]

    500 MHz, characteristic; 425 MHz, warranted

    Rise/fall time, typical[8]

    50 Ω

    170 ps

    1 MΩ

    750 ps

    AC-coupling cutoff (-3 dB), typical[9]

    10 Hz

    Figure 2. NI 5185 Step Response, 50 Ω, -0.25 V Programmable Offset, 150 ps Rising Edge, Characteristic
    Figure 3. PXIe-5185 Step Response, 1 MΩ, -0.25 V Programmable Offset, 500 ps Rising Edge, Characteristic
    Figure 4. NI 5185 50 Ω Frequency Response, Characteristic
    Figure 5. PXIe-5185 1 MΩ Frequency Response, Characteristic

    Spectral Characteristics

    PXIe-5185 50 Ω Spectral Characteristics

    Spurious-Free Dynamic Range (SFDR), characteristic[10]
    0.11 Vpk-pk, 0.2 Vpk-pk, or 0.5 Vpk-pk range

    ≤10 MHz

    51 dBc

    >10 MHz to ≤1 GHz

    50 dBc

    >1 GHz to ≤3 GHz

    46 dBc

    1 Vpk-pk range

    ≤10 MHz

    50 dBc

    >10 MHz to ≤1 GHz

    47 dBc

    >1 GHz to ≤3 GHz

    46 dBc

    Total Harmonic Distortion (THD), characteristic[11]
    0.11 Vpk-pk, 0.2 Vpk-pk, or 0.5 Vpk-pk range

    ≤ 10 MHz

    -54 dBc

    >10 MHz to ≤1 GHz

    -49 dBc

    >1 GHz to ≤3 GHz

    -52 dBc

    1 Vpk-pk range

    ≤ 10 MHz

    -50 dBc

    >10 MHz to ≤1 GHz

    -46 dBc

    >1 GHz to ≤3 GHz

    -46 dBc

    Effective Number of Bits (ENOB), characteristic[12]

    10 MHz

    6.5

    1 GHz

    6.3

    3 GHz

    6.0

    Signal to Noise and Distortion (SINAD), characteristic[13]

    10 MHz

    40.9 dB

    1 GHz

    39.7 dB

    3 GHz

    37.9 dB

    PXIe-5185 1 MΩ Spectral Characteristics

    SFDR, characteristic[14]
    0.11 Vpk-pk, 0.2 Vpk-pk, or 0.5 Vpk-pk range

    ≤10 MHz

    51 dBc

    >10 MHz to ≤300 MHz

    45 dBc

    1 Vpk-pk, 2 Vpk-pk, 5 Vpk-pk, or 10 Vpk-pk range

    ≤10 MHz

    50 dBc

    >10 MHz to ≤300 MHz

    41 dBc

    Total Harmonic Distortion (THD), characteristic[14]
    0.11 Vpk-pk, 0.2 Vpk-pk, or 0.5 Vpk-pk range

    ≤10 MHz

    -54 dBc

    >10 MHz to ≤300 MHz

    -44 dBc

    1 Vpk-pk, 2 Vpk-pk, 5 Vpk-pk, or 10 Vpk-pk range

    ≤10 MHz

    -50 dBc

    >10 MHz to ≤300 MHz

    -40 dBc

    ENOB, characteristic[15]
    0.11 Vpk-pk range

    10 MHz

    5.9

    300 MHz

    5.9

    0.2 Vpk-pk, 0.5 Vpk-pk, 1 Vpk-pk, 2 Vpk-pk, 5 Vpk-pk, or 10 Vpk-pk range

    10 MHz

    6.3

    300 MHz

    6.3

    SINAD, characteristic[16]
    0.11 Vpk-pk range

    10 MHz

    37.3 dB

    300 MHz

    37.3 dB

    0.2 Vpk-pk, 0.5 Vpk-pk, 1 Vpk-pk, 2 Vpk-pk, 5 Vpk-pk, or 10 Vpk-pk range

    10 MHz

    39.7 dB

    300 MHz

    39.7 dB

    Noise

    RMS noise, typical[17]

    50 Ω

    0.35% of FS

    1 MΩ

    0.5% of FS

    Average noise density, typical[18]

    50 Ω

    -137 dBFS/Hz

    1 MΩ

    -134 dBFS/Hz

    Skew

    Channel-to-channel skew, characteristic

    50 Ω to 50 Ω

    < 10 ps

    1 MΩ to 1 MΩ

    < 45 ps

    50 Ω to 1 MΩ

    < 1.5 ns

    Horizontal

    Sample Clock

    Sources

    Internal

    Onboard clock (internal VCO)[19]

    External

    Front panel SMA connector

    Onboard Clock (Internal VCO)

    Real-time sample rate range

    One channel enabled

    190.740 kS/s to 12.5 GS/s[20]

    Two channels enabled

    190.740 kS/s to 6.25 GS/s[20]

    Random Interleaved Sampling (RIS) range

    Up to 250 GS/s[21]

    Figure 6. PXIe-5185 Phase Noise (Plotted without Spurs) at 1 GHz, 3 dBm Input Signal, Locked to 100 MHz PXI Express Backplane (Characteristic)

    Sample clock jitter, characteristic[22]

    500 fs rms (12 kHz to 10 MHz)

    Timebase frequency

    3.125 GHz

    Timebase accuracy[23]

    Accuracy equal to the backplane or user-provided Reference clock

    External Sample Clock

    Sources

    CLK IN (front panel SMA connector)

    Frequency range[24]

    1.6 GHz to 3.125 GHz

    Duty cycle tolerance, typical

    45% to 55%

    Phase-Locked Loop (PLL) Reference Clock

    Sources

    Internal

    PXIe_CLK100 (backplane connector)

    External

    REF CLK (front panel SMB connector)

    Frequency[25]

    10 MHz or 100 MHz

    Duty cycle tolerance, characteristic

    45% to 55%

    CLK IN (Sample Clock Input, Front Panel Connector)

    Input voltage range, characteristic

    Sine wave: 0.45 Vpk-pk to 1.78 Vpk-pk (–3 dBm to 9 dBm)

    Maximum input overload, characteristic

    3 Vrms, |Peaks| ≤ 4.25 V

    Impedance, nominal

    50 Ω

    Coupling

    AC

    REF CLK (Reference Clock In, Front Panel Connector)

    Input voltage range, characteristic

    Sine wave: -2 dBm to 16 dBm

    Maximum input overload, typical

    1.6 Vrms, |Peaks| ≤ 10 V (1 ms peak)

    Impedance, nominal

    50 Ω

    Coupling

    AC

    Frequency[26]

    10 MHz or 100 MHz

    Trigger

    Supported trigger

    Reference (stop) trigger

    Trigger types

    Edge, Digital, Immediate, and Software

    Trigger sources

    CH 0, CH 1, TRIG, PXI_Trig <0..6>, and Software

    Time resolution
    Onboard Clock

    TDC (Time to Digital Conversion Circuit) on

    3 ps

    TDC off

    2.56 ns

    External clock, TDC off

    External clock period × 8

    Rearm time[27]

    TDC on

    10 μs

    TDC off

    2 μs

    Holdoff

    Rearm time to 10.99 s

    Trigger delay

    From 0 to 1,450,000 seconds (15 days)

    Analog Trigger (Edge Trigger Type)

    Sources

    CH 0, CH 1, or TRIG

    Trigger level range

    CH 0, CH 1

    100% of FS

    TRIG (external trigger)

    ±5 V

    Voltage resolution

    CH 0, CH 1

    8 bits (1 in 256)

    TRIG (external trigger), characteristic

    10 bits (1 in 1,024)

    Edge trigger sensitivity

    CH 0, CH 1, typical

    3% of FS at ≤1 GHz

    TRIG (external trigger), characteristic

    2% of FS at ≤100 MHz

    Trigger level accuracy

    CH 0, CH 1, typical

    ±5% of FS at ≤100 MHz[28]

    TRIG (external trigger), characteristic

    ±5% at ≤100 MHz[29]

    Trigger jitter

    CH 0, CH 1, typical

    ≤16 ps rms

    TRIG (external trigger), characteristic

    ≤16 ps rms

    Digital Trigger (Digital Trigger Type)

    Sources

    PXIe_TRIG <0..6> (backplane connector)

    TRIG (External Trigger, Front Panel Connector)

    Connector

    SMA

    Impedance, nominal

    50 Ω

    Coupling

    DC

    Input voltage range, nominal

    ±5 V

    Maximum input overload, characteristic

    |Peaks| ≤ 6 V

    TClk Specifications

    You can use the National Instruments TClk synchronization method and the NI-TClk driver to align the Sample clocks on any number of SMC-based modules in a chassis. Specifications are valid for any number of NI 5185 or NI 5186 modules installed in one PXI Express chassis, with all parameters set to identical values for each SMC-based module. For more information about TClk synchronization, refer to the NI-TClk Synchronization Help, which is located within the NI High-Speed Digitizers Help. For other configurations, including multichassis systems, contact NI Technical Support at ni.com/support.

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    Note  

    You can only use NI-TClk to synchronize NI 5185 or NI 5186 devices to other NI 5185 or NI 5186 devices. These specifications apply only to synchronizing identical modules without using an external Sample clock.

    Intermodule SMC synchronization using NI-TClk for identical modules, characteristic

    Skew[30]

    500 ps

    Skew after manual adjustment

    160 ps

    Sample clock delay/adjustment resolution

    80 ps

    Triggers that can be TClk synchronized[31]

    Reference trigger

    Waveform Specifications

    Onboard memory sizes[32]

    32 MB or 1 GB

    Minimum record length, characteristic

    1 sample

    Number of pretrigger samples, characteristic[33]

    Zero up to full record length

    Number of posttrigger samples, characteristic[33]

    Zero up to full record length

    Maximum number of records in onboard memory, characteristic

    16 MB per channel

    4,096[34]

    512 MB per channel

    100,000[34]

    Allocated onboard memory per record, characteristic

    [(Record length × 1 byte/sample) + 1,500], rounded up to: 4 KB, 8 KB, 16 KB, 32 KB, 64 KB, or an integer multiple of 128 KB

    Memory Sanitization

    For information about memory sanitization, refer to the NI PXIe-5185/5186 Letter of Volatility, which is available for download from ni.com/manuals.

    Calibration

    Power-up calibration

    Automatically performed by the device at power-on to calibrate the gain, offset, and phase of the ADCs on the device. Typically takes 5 to 10 minutes to complete.

    Self-calibration

    Self-calibration is done on software command. The calibration corrects for gain, offset, triggering, and timing errors for all input ranges, excluding the External Trigger input channel (TRIG). Refer to the NI High-Speed Digitizers Help for information about when to self-calibrate the device.

    External calibration

    The external calibration calibrates the onboard references used in self-calibration, the input overload levels, and the external trigger levels. All calibration constants are stored in nonvolatile memory.

    Interval for external calibration

    1 year

    Warm-up time

    25 minutes

    Power

    +3.3 VDC

    5.1 A

    +12 VDC

    6.1 A

    +5 Vaux

    12 mA

    Total power

    90 W

    Software

    Driver Software

    This device is supported in NI-SCOPE 3.9.6 or later. NI-SCOPE is an IVI-compliant driver that allows you to configure, control, and calibrate the PXIe-5185. NI-SCOPE provides application programming interfaces for many development environments.

    Application Software

    NI-SCOPE provides programming interfaces, documentation, and examples for the following application development environments:

    • LabVIEW
    • LabWindows™/CVI™
    • Measurement Studio
    • Microsoft Visual C/C++
    • Microsoft Visual Basic

    Interactive Soft Front Panel and Configuration

    The NI-SCOPE Soft Front Panel version 3.9.6 or later supports interactive control of the PXIe-5185. The NI-SCOPE Soft Front Panel is included on the NI-SCOPE DVD.

    National Instruments Measurement & Automation Explorer (MAX) also provides interactive configuration and test tools for the PXIe-5185. MAX is included on the NI-SCOPE DVD.

    Physical

    Dimensions and Weight

    Dimensions

    3U, 3 slot, PXI Express Module, 21.6 × 6.2 × 13.0 cm (8.5 × 2.4 × 5.1 in.)

    Weight

    50 Ω

    1,208 g (42.61 oz.)

    1 MΩ

    1,222 g (43.10 oz.)

    Environment

    Maximum altitude

    2,000 m (at 25 °C ambient temperature)

    Pollution Degree

    2

    Indoor use only.

    Operating Environment

    Ambient temperature range

    0 °C to 55 °C (Tested in accordance with IEC 60068-2-1 and IEC 60068-2-2. Meets MIL-PRF-28800F Class 3 low temperature limit and MIL-PRF-28800F Class 2 high temperature limit.)

    Relative humidity range

    10% to 90%, noncondensing (Tested in accordance with IEC 60068-2-56.)

    Storage Environment

    Ambient temperature range

    -40 °C to 71 °C (Tested in accordance with IEC 60068-2-1 and IEC 60068-2-2. Meets MIL-PRF-28800F Class 3 limits.)

    Relative humidity range

    5% to 95%, noncondensing (Tested in accordance with IEC 60068-2-56.)

    Shock and Vibration

    Operating shock

    30 g peak, half-sine, 11 ms pulse (Tested in accordance with IEC 60068-2-27. Meets MIL-PRF-28800F Class 2 limits.)

    Random vibration

    Operating

    5 Hz to 500 Hz, 0.3 grms

    Nonoperating

    5 Hz to 500 Hz, 2.4 grms (Tested in accordance with IEC 60068-2-64. Nonoperating test profile exceeds the requirements of MIL-PRF-28800F, Class 3.)

    Compliance and Certifications

    Safety

    This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:

    • IEC 61010-1, EN 61010-1
    • UL 61010-1, CSA 61010-1
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    Note  

    For UL and other safety certifications, refer to the product label or the Online Product Certification section.

    Electromagnetic Compatibility

    This product meets the requirements of the following EMC standards for electrical equipment for measurement, control, and laboratory use:
    • EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity
    • EN 55011 (CISPR 11): Group 1, Class A emissions
    • AS/NZS CISPR 11: Group 1, Class A emissions
    • FCC 47 CFR Part 15B: Class A emissions
    • ICES-001: Class A emissions
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    Note  

    In the United States (per FCC 47 CFR), Class A equipment is intended for use in commercial, light-industrial, and heavy-industrial locations. In Europe, Canada, Australia, and New Zealand (per CISPR 11), Class A equipment is intended for use only in heavy-industrial locations.

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    Note  

    Group 1 equipment (per CISPR 11) is any industrial, scientific, or medical equipment that does not intentionally generate radio frequency energy for the treatment of material or inspection/analysis purposes.

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    Note  

    For EMC declarations and certifications, refer to the Online Product Certification section.

    CE Compliance

    This product meets the essential requirements of applicable European Directives, as follows:

    • 2014/35/EU; Low-Voltage Directive (safety)
    • 2014/30/EU; Electromagnetic Compatibility Directive (EMC)

    Online Product Certification

    Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for this product, visit ni.com/certification, search by model number or product line, and click the appropriate link in the Certification column.

    Environmental Management

    NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.

    For additional environmental information, refer to the Minimize Our Environmental Impact web page at ni.com/environment. This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.

    Waste Electrical and Electronic Equipment (WEEE)

    spd-note-weee
    EU Customers  

    At the end of the product life cycle, all NI products must be disposed of according to local laws and regulations. For more information about how to recycle NI products in your region, visit ni.com/environment/weee.

    电子信息产品污染控制管理办法(中国RoHS)

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    中国客户  

    National Instruments符合中国电子信息产品中限制使用某些有害物质指令(RoHS)。关于National Instruments中国RoHS合规性信息,请登录 ni.com/environment/rohs_china。(For information about China RoHS compliance, go to ni.com/environment/rohs_china.)

    • 1 50 Ω input only.
    • 2 Signals exceeding the maximum input overload may cause damage to the device.
    • 3 Within ±3 °C of self-calibration temperature.
    • 4 Used to calculate errors when temperature changes more than ±3 °C since the last self-calibration.
    • 5 Measured on one channel with test signal applied to other channel. Same range settings used on both channels.
    • 6 Normalized to 50 kHz.
    • 7 1 MΩ input tested using a 50 Ω source and a 50 Ω feed through terminator connected at the input.
    • 8 50% FS input pulse, 23°C ± 10°C.
    • 9 AC coupling available on 1 MΩ only.
    • 10 -1 dBFS input signal. Includes the 2nd through the 5th harmonics.
    • 11 -1 dBFS input signal. Includes the 2nd through the 5th harmonics.
    • 12 -1 dBFS input signal corrected to FS. Includes the 2nd through the 5th harmonics. 18 kHz resolution bandwidth (RBW).
    • 13 -1 dBFS input signal corrected to FS. Includes the 2nd through the 5th harmonics. 18 kHz resolution bandwidth (RBW).
    • 14 For ≤100 MHz, -1 dBFS input signal corrected to FS. For >100 MHz, -2 dBFS input signal corrected to FS.
    • 15 For 10 MHz, -1 dBFS input signal corrected to FS. For 300 MHz, -2 dBFS input signal corrected to FS. Includes the 2nd through the 5th harmonics. 18 kHz resolution bandwidth (RBW).
    • 16 For 10 MHz, -1 dBFS input signal corrected to FS. For 300 MHz, -2 dBFS input signal corrected to FS. Includes the 2nd through the 5th harmonics. 18 kHz resolution bandwidth (RBW).
    • 17 50 Ω terminator connected to input. 23°C ± 10°C.
    • 18 50 Ω terminator connected to input. 23°C ± 10°C.
    • 19 Internal Sample clock is locked to the PXIe_CLK100 Reference clock.
    • 20 Divide by n decimation from 6.25 GS/s used for all rates less than maximum sample rate. For more information about Sample clock and decimation, refer to the NI High-Speed Digitizers Help.
    • 21 With one channel enabled, stepped in multiples of 12.5 GS/s. With two channels enabled, stepped in multiples of 6.25 GS/s.
    • 22 Includes the effects of the converter aperture uncertainty and the clock circuitry jitter. Excludes trigger jitter.
    • 23 Phase-locked to Reference clock. The chassis clock or external Reference clock must be accurate to 25 parts per million (ppm), or (1 × 10-6).
    • 24 Divide by n decimation available where 1 ≤ n ≤ 65535. For more information about Sample clock and decimation, refer to the NI High-Speed Digitizers Help. The effective sample rate can be 1 × Input Frequency or 2 × Input Frequency when acquiring on two channels, or 1 × Input Frequency, 2 × Input Frequency or 4 × Input Frequency when acquiring on one channel; use the Sample Clock Timebase Multiplier property or the NISCOPE_ATTR_SAMP_CLK_TIMEBASE_MULT attribute to specify.
    • 25 The PLL Reference clock frequency must be accurate to ±25 ppm.
    • 26 The PLL Reference clock frequency must be accurate to ±25 ppm.
    • 27 Holdoff set to 0.
    • 28 Within ±5 °C of self-calibration temperature.
    • 29 When same impedance settings used on both input channels. For more information about functionality when using mixed impedances between the input channels, visit ni.com/kb and enter 5W8CFE8P.
    • 30 Caused by clock and analog path delay differences. No manual adjustment performed.
    • 31 Synchronized triggers are synchronized to ±1 Sample clock timebase.
    • 32 Onboard memory is shared between all enabled channels.
    • 33 Single-record and multirecord acquisitions.
    • 34 You can exceed these numbers if you fetch records while acquiring data. For more information, refer to the NI High-Speed Digitizers Help.

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