Table Of Contents

PXIe-5162 Front Panel

Version:
    Last Modified: February 21, 2017

    PXIe-5162 (4CH)


    Table 1. Connector Descriptions
    Connector Description
    CH 0 to CH 3 Analog input connection; digitizes data and triggers acquisitions.
    CLK IN Imports an external Reference Clock or Sample Clock to the device.
    CLK OUT Exports the Reference Clock from the device.
    PFI 0 PFI line for digital trigger input/output.
    PFI 1 PFI line for digital trigger input/output and probe compensation. No subsample trigger accuracy.

    PXIe-5162 (2CH)


    Table 2. Connector Descriptions
    Connector Description
    CH 0, CH 1 Analog input connection; digitizes data and triggers acquisitions.
    TRIG External analog trigger connection; signals on the TRIG connector cannot be digitized.
    CLK IN Imports an external Reference Clock or Sample Clock to the device.
    CLK OUT Exports the Reference Clock from the device.
    PFI 0 PFI line for digital trigger input/output.
    PFI 1 PFI line for digital trigger input/output and probe compensation. No subsample trigger accuracy.

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