Table Of Contents

Functional Overview

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    Last Modified: February 24, 2017

    The PXIe-8115 is a modular PC in a PXI Express 3U-size form factor. The following figure is a functional block diagram of the PXIe-8115. Following the diagram is a description of each logic block shown.

    Figure 1. PXIe-8115 Block Diagram

    The PXIe-8115 consists of the following logic blocks on the CPU module and the I/O (daughter card) module. The CPU module has the following logic blocks:

    • The processor is an Intel® Core™ i5-2510E Processor (3 MB Cache, 2.5 GHz). The processor connects to the SO-DIMM block through the DDR3 interface supporting up to 1333 MHz SO-DIMMs. It connects to the PCH through a x4 DMI2 (Direct Media Interface) interface supporting up to 5 GT/s per lane and through a x4 FDI (Flexible Display Interface) supporting up to 2.7 GT/s per lane.
    • The SO-DIMM block consists of one 64-bit DDR3 SDRAM socket that can hold up to 8 GB of memory.
    • The PCH (Platform Controller Hub) provides the DisplayPort, USB, PCI Express, LPC, and SPI interfaces that connect to the peripherals on the PXIe-8115.
    • The DisplayPort block consists of two DisplayPort connectors.
    • The USB block consists of six Hi-Speed USB 2.0 connectors.
    • The GPIB block contains the GPIB interface.
    • The ExpressCard/34 slot accommodates an ExpressCard/34 module.
    • The Ethernet Port 1 block consists of an Intel® 82579LM Gigabit Ethernet Connection.
    • The Ethernet Port 2 block consists of an Intel® 82574L Gigabit Ethernet Connection.
    • The Super I/O block connects to one serial port and one ECP/EPP parallel port.
    • The SMB Front Panel Trigger provides a routable connection of the PXI triggers to/from the SMB on the front panel.
    • The Watchdog block consists of a watchdog timer that can reset the controller or generate triggers.
    • The PXIe Express Connectors connect the PXIe-8115 to the PXI Express/CompactPCI Express backplane.

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