Table Of Contents

PCI-5922 Specifications

    Last Modified: December 12, 2017


    Warranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.

    The following characteristic specifications describe values that are relevant to the use of the model under stated operating conditions but are not covered by the model warranty.

    • Typical specifications describe the performance met by a majority of models.
    • Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing.


    Specifications are valid under the following conditions unless otherwise noted.

    • Full operating temperature range
    • All impedance selections
    • All sample rates
    • Source impedance ≤50 Ω

    Typical specifications are valid under the following conditions unless otherwise noted:

    • Ambient temperatures of 15 °C to 35 °C


    Analog Input

    Number of channels

    Software-selectable: two simultaneously sampling, single-ended or unbalanced differential channels or one differential channel



    Impedance and Coupling

    Input impedance

    Software-selectable: 50 Ω ±2.0% or 1 MΩ ±2.0% in parallel with a typical capacitance of 60 pF

    Input coupling

    AC, DC, GND

    Voltage Levels

    Full-scale (FS) input range

    ±1 V (2 Vpk-pk)

    ±5 V (10 Vpk-pk)

    Maximum input overload

    50 Ω

    7 Vrms with |Peaks| ≤10 V

    1 MΩ

    |Peaks| ≤42 V


    Table 1. PCI-5922 Resolution
    Sample Rate Resolution
    50 kS/s 24 bits
    500 kS/s 24 bits
    1 MS/s 22 bits
    5 MS/s 20 bits
    10 MS/s 18 bits
    15 MS/s 16 bits
    DC accuracy[1]

    2 Vpk-pk range

    ±(500 ppm (0.05%) of input + 50 μV)

    10 Vpk-pk range

    ±(500 ppm (0.05%) of input + 100 μV)

    DC drift[2]

    2 Vpk-pk range

    ±(20 ppm of input + 5 μV per °C)

    10 Vpk-pk range

    ±(20 ppm of input + 10 μV per °C)

    AC amplitude accuracy

    ±600 ppm (0.06%) at 1 kHz, typical[3]


    At 100 kHz

    ≤-110 dB, typical

    At 1 MHz

    ≤-100 dB, typical

    At 6 MHz

    ≤-80 dB, typical

    Common-mode rejection ratio (CMRR)

    50 dB up to 1 kHz[5]

    Figure 1. PCI-5922 CMRR with Differential Terminal Configuration, Typical

    Bandwidth and Transient Response

    Alias-free bandwidth

    0.4 × Sample Rate

    Table 2. Alias Protection, Typical [6]
    Sample Rate Attenuation
    <5 MS/s 100 dB
    5 MS/s 96 dB
    5 MS/s < rate < 7.5 MS/s 90 dB
    7.5 MS/srate15 MS/s 80 dB

    AC coupling cutoff (-3 dB)

    90 Hz

    Table 3. Passband Flatness, Typical [7]
    Sample Rate 50 Ω and 1 MΩ
    1 MS/s 0.03 dB
    5 MS/s 0.06 dB
    10 MS/s 0.15 dB
    15 MS/s 0.3 dB
    Figure 2. 100 kS/s Frequency Response, Typical
    Figure 3. 1 MS/s Frequency Response, Typical
    Figure 4. 10 MS/s Frequency Response, Typical

    Spectral Characteristics

    Table 4. Spurious-Free Dynamic Range (SFDR), Typical [8]
    Input Frequency Range
    10 Vpk-pk 2 Vpk-pk
    10 kHz 114 dBc 109 dBc
    100 kHz 110 dBc 103 dBc
    1 MHz 96 dBc 92 dBc
    Figure 5. PCI-5922 Dynamic Performance with 10 kHz Input Signal, Typical, 1 MΩ, 10 Vpk-pk Range, 500 kS/s, Unbalanced Differential, 10,000-Point FFT with 10 Averages
    Figure 6. PCI-5922 Dynamic Performance with 10 kHz Input Signal, Typical, 1 MΩ, 2 Vpk-pk Range, 100 kS/s, Unbalanced Differential, 10,000-Point FFT with 10 Averages
    Table 5. Total Harmonic Distortion (THD), Typical [9]
    Input Frequency Range
    10 Vpk-pk 2 Vpk-pk
    10 kHz -112 dBc -107 dBc
    100 kHz -108 dBc -101 dBc
    1 MHz -94 dBc -90 dBc
    Table 6. Signal-to-Noise and Distortion (SINAD), Typical [10]
    Sample Rate Range
    10 Vpk-pk 2 Vpk-pk
    1 MS/s 105 dB 99 dB
    10 MS/s 89 dB 87 dB
    Table 7. Signal-to-Noise Ratio (SNR) without Harmonics, Typical [11]
    Sample Rate Range
    10 Vpk-pk 2 Vpk-pk
    1 MS/s 108 dB 104 dB
    10 MS/s 91 dB 90 dB
    Table 8. RMS Noise [12]
    Sample Rate Range
    10 Vpk-pk 2 Vpk-pk
    dBFS μVrms dBFS μVrms
    50 kS/s -120 3.4 -110 2.2
    100 kS/s -118 4.3 -110 2.2
    1 MS/s -108 13 -104 4.2
    5 MS/s -101 31 -98 8.7
    10 MS/s -91 92 -91 20
    15 MS/s -79 401 -79 80
    Figure 7. PCI-5922 Noise Density, Typical

    Skew, Input Bias Current

    Channel-to-channel skew[13]

    ≤500 ps, typical

    Input bias current[14]

    ≤500 nA

    Settling Time

    Table 9. Settling Time [15]
    Filter Type[16] 1% 0.01%
    48 Tap Standard 800 ns 2.5 µs
    48 Tap Hanning 700 ns 1.5 µs
    16 Tap Hanning 300 ns 1.4 µs
    8 Tap Hanning 200 ns 1.3 µs
    Figure 8. PCI-5922 Step Response Using Different Filter Types [17]
    Figure 9. PCI-5922 Frequency Response Using Different Filter Types


    Sample Clock


    Internal onboard clock (internal VCXO)[18]

    Onboard Clock (Internal VCXO)

    Sample rate range, real-time sampling (single shot)[19]

    50 kS/s to 15 MS/s

    Phase noise density (5 MHz input signal)

    At 10 kHz

    <-133 dBc/Hz, typical

    At 100 kHz

    <-145 dBc/Hz, typical

    Sample clock jitter[20]

    ≤3 psrms (100 Hz to 1 MHz), typical

    Timebase frequency

    120 MHz

    Timebase accuracy

    Not phase-locked to Reference clock

    ±50 ppm, typical

    Phase-locked to Reference clock

    Equal to the Reference clock accuracy

    Sample clock delay range

    ±1 Sample clock period

    Sample clock delay resolution

    400 ps

    Phase-Locked Loop (PLL) Reference Clock

    Reference clock sources

    RTSI 7

    CLK IN (front panel SMB connector)

    Frequency range

    1 MHz to 20 MHz in 1 MHz increments[21]; must be accurate to ±50 ppm

    Duty cycle tolerance

    45% to 55%

    Exported Reference clock destinations

    CLK OUT (front panel SMB connector)

    PFI <0..1> (front panel 9-pin mini-circular DIN connector)

    RTSI <0..7>

    CLK IN (Reference Clock Input, Front Panel Connector)

    Input voltage range

    Square wave: 0.2 Vpk-pk to 1 Vpk-pk

    Maximum input overload

    7 Vrms with |Peaks| ≤ 10 V


    50 Ω



    CLK OUT (Reference Clock Output, Front Panel Connector)

    Output impedance

    50 Ω

    Logic type

    5 V CMOS

    Maximum drive current

    ±50 mA


    Reference (Stop) Trigger

    Trigger types







    Trigger sources

    CH 0

    CH 1


    PXI_Trig <0..6>

    PFI <0..1>

    PXI Star Trigger

    RTSI <0..6>


    Time resolution

    Sample clock period

    Rearm time

    144 × Sample clock period[22]


    Up to (232 - 1) × Sample clock period

    Analog Trigger

    Trigger types





    CH 0 (front panel BNC connector)

    CH 1 (front panel BNC connector)

    TRIG (front panel BNC connector)

    Trigger level range

    100% FS

    Edge trigger sensitivity

    CH 0, CH 1

    2% FS, typical

    TRIG (external trigger)

    0.3 Vpk-pk up to 1 MHz, typical


    Sample clock period

    Digital Trigger

    Trigger type



    RTSI <0..6>

    PFI <0..1> (front panel 9-pin DIN connector)

    External Trigger


    TRIG (front panel BNC connector)


    100 kΩ in parallel with 52 pF

    Input voltage range

    ±2.5 V



    Level accuracy

    ±0.3 V up to 100 kHz, typical

    Maximum input overload

    |Peaks| ≤42 V

    PFI 0 and PFI 1 (Programmable Function Interface, AUX Front Panel Connectors)


    9-pin mini-circular DIN



    As an Input (Trigger)


    Start trigger (acquisition arm)

    Reference (stop) trigger

    Arm Reference trigger

    Advance trigger

    Input impedance

    150 kΩ


    2.0 V


    0.8 V

    Maximum input overload

    -0.5 V, 5.5 V

    Maximum frequency

    25 MHz

    As an Output (Event)


    Start trigger (acquisition arm)

    Reference (stop) trigger

    End of Record

    Done (end of acquisition)

    Output impedance

    50 Ω

    Logic type

    3.3 V CMOS

    Maximum drive current

    ±24 mA

    Maximum frequency

    20 MHz

    Waveform Specifications

    Onboard memory size

    8 MB/channel

    2 MS/channel

    32 MB/channel

    8 MS/channel

    256 MB/channel

    64 MS/channel

    Minimum record length

    1 Sample

    Number of pretrigger samples

    0 up to full Record Length for both single-record mode and multiple-record mode

    Number of posttrigger samples

    0 up to full Record Length for both single-record mode and multiple-record mode

    Maximum number of records in onboard memory[24]

    8 MB/channel


    32 MB/channel


    256 MB/channel


    Allocated onboard memory per record

    (Record Length × 4 bytes/S) + 400 bytes, rounded up to next multiple of 128 bytes or 640 bytes, whichever is greater



    Self-calibration is done on software command. The calibration corrects for gain and offset for all input ranges, input bias current, and nonlinearities in the ADCs.

    External calibration (factory calibration)

    The external calibration calibrates the VCXO and the voltage reference. Appropriate constants are stored in nonvolatile memory.

    Interval for external calibration

    2 years

    Warm-up time

    15 minutes


    Driver Software

    Driver support for this device was first available in NI-SCOPE 3.0.

    NI-SCOPE is an IVI-compliant driver that allows you to configure, control, and calibrate the PCI-5922. NI-SCOPE provides application programming interfaces for many development environments.

    Application Software

    NI-SCOPE provides programming interfaces, documentation, and examples for the following application development environments:

    • LabVIEW
    • LabWindows™/CVI™
    • Measurement Studio
    • Microsoft Visual C/C++
    • .NET (C# and VB.NET)

    Interactive Soft Front Panel and Configuration

    The NI-SCOPE Soft Front Panel (SFP) allows interactive control of the PCI-5922.

    Interactive control of the PCI-5922 was first available in NI-SCOPE SFP version 2.2. The NI-SCOPE SFP is included on the NI-SCOPE media.

    NI Measurement Automation Explorer (MAX) also provides interactive configuration and test tools for the PCI-5922. MAX is included on the NI-SCOPE media.

    TClk Specifications

    You can use the NI TClk synchronization method and the NI-TClk driver to align the Sample clocks on any number of supported devices, in one or more chassis. For more information about TClk synchronization, refer to the NI-TClk Synchronization Help, which is located within the NI High-Speed Digitizers Help. For other configurations, including multichassis systems, contact NI Technical Support at

    Intermodule SMC Synchronization Using NI-TClk for Identical Modules

    Specifications are valid under the following conditions:

    • Any number of PXI modules installed in one NI PXI-1042 chassis.
    • All parameters set to identical values for each SMC-based module.
    • Sample clock set to 15 MS/s and all filters disabled.


    500 ps, typical

    Average skew after manual adjustment

    <10 ps, typical

    Sample clock delay/adjustment resolution

    ≤5 ps, typical


    Current draw

    +3.3 VDC

    2.0 A, typical

    +5 VDC

    2.5 A, typical

    +12 VDC

    450 mA, typical

    -12 VDC

    0 A, typical

    Total power

    24.5 W, typical



    35.5 cm × 2.0 cm × 11.3 cm

    (14.0 in × 0.8 in × 4.4 in)


    415 g (14.6 oz)


    Maximum altitude

    2,000 m (at 25 °C ambient temperature)

    Pollution Degree


    Indoor use only.


    To ensure that the PCI-5922 cools effectively, make sure that the chassis in which it is used has active cooling that provides at least some airflow across the PCI card cage. To maximize airflow and extend the life of the device, leave any adjacent PCI slots empty. Refer to the Maintain Forced-Air Cooling Note to Users included in the kit or available at for important cooling information. The PCI-5922 is intended for indoor use only.

    Operating Environment

    Ambient temperature range

    0 °C to 45 °C (Tested in accordance with IEC 60068-2-1 and IEC 60068-2-2.)

    Relative humidity range

    10% to 90%, noncondensing (Tested in accordance with IEC 60068-2-56.)

    Storage Environment

    Ambient temperature range

    -40 °C to 71 °C (Tested in accordance with IEC 60068-2-1 and IEC 60068-2-2.)

    Relative humidity range

    5% to 95%, noncondensing (Tested in accordance with IEC 60068-2-56.)

    Compliance and Certifications


    This product is designed to meet the requirements of the following electrical equipment safety standards for measurement, control, and laboratory use:

    • IEC 61010-1, EN 61010-1
    • UL 61010-1, CSA C22.2 No. 61010-1

    For UL and other safety certifications, refer to the product label or the Online Product Certification section.

    Electromagnetic Compatibility

    This product meets the requirements of the following EMC standards for electrical equipment for measurement, control, and laboratory use:
    • EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity
    • EN 55011 (CISPR 11): Group 1, Class A emissions
    • EN 55022 (CISPR 22): Class A emissions
    • EN 55024 (CISPR 24): Immunity
    • AS/NZS CISPR 11: Group 1, Class A emissions
    • AS/NZS CISPR 22: Class A emissions
    • FCC 47 CFR Part 15B: Class A emissions
    • ICES-001: Class A emissions

    In the United States (per FCC 47 CFR), Class A equipment is intended for use in commercial, light-industrial, and heavy-industrial locations. In Europe, Canada, Australia, and New Zealand (per CISPR 11), Class A equipment is intended for use only in heavy-industrial locations.


    Group 1 equipment (per CISPR 11) is any industrial, scientific, or medical equipment that does not intentionally generate radio frequency energy for the treatment of material or inspection/analysis purposes.


    For EMC declarations, certifications, and additional information, refer to the Online Product Certification section.

    CE Compliance

    This product meets the essential requirements of applicable European Directives, as follows:

    • 2014/35/EU; Low-Voltage Directive (safety)
    • 2014/30/EU; Electromagnetic Compatibility Directive (EMC)

    Online Product Certification

    Refer to the product Declaration of Conformity (DoC) for additional regulatory compliance information. To obtain product certifications and the DoC for this product, visit, search by model number or product line, and click the appropriate link in the Certification column.

    Environmental Management

    NI is committed to designing and manufacturing products in an environmentally responsible manner. NI recognizes that eliminating certain hazardous substances from our products is beneficial to the environment and to NI customers.

    For additional environmental information, refer to the Minimize Our Environmental Impact web page at This page contains the environmental regulations and directives with which NI complies, as well as other environmental information not included in this document.

    Waste Electrical and Electronic Equipment (WEEE)

    EU Customers  

    At the end of the product life cycle, all NI products must be disposed of according to local laws and regulations. For more information about how to recycle NI products in your region, visit



    National Instruments符合中国电子信息产品中限制使用某些有害物质指令(RoHS)。关于National Instruments中国RoHS合规性信息,请登录。(For information about China RoHS compliance, go to

    • 1 1 MΩ input impedance; within ±5 °C of self-calibration temperature; ppm = parts per million (1 × 10 -6 ).
    • 2 1 MΩ input impedance.
    • 3 1 MΩ input impedance; within ±5 °C of self-calibration temperature.
    • 4 CH 0 to/from CH 1, External Trigger to CH 0 or CH 1.
    • 5 Unbalanced differential input terminal configuration.
    • 6 Input frequencies ≥ 0.6 × Sample Rate.
    • 7 Referenced to DC; input frequencies up to 0.4 × Sample Rate.
    • 8 -1 dBFS input signal; Sample Rate is 10 × input frequency; within ±2 °C of self-calibration temperature.
    • 9 -1 dBFS input signal; includes the second through the fifth harmonics; within ±2 °C of self-calibration temperature .
    • 10 -1 dBFS input signal; input frequency is 0.1 × Sample rate; within ±2 °C of self-calibration temperature; calculated from THD and RMS noise.
    • 11 -1 dBFS input signal; input frequency is 0.1 × Sample rate; within ±2 °C of self-calibration temperature; calculated from SINAD and THD.
    • 12 100 Hz to 0.4 × Sample rate; DC coupling; input 50 Ω terminated.
    • 13 1 MHz input, 5 MS/s sample rate.
    • 14 Within ±5 °C of self-calibration temperature.
    • 15 For a 3 V step from 0 V DC, excluding noise; time referenced to 1.5 V (50%) trigger; applies to 15 MS/s sample rate only.
    • 16 To set or change the filter type, use the Flex FIR Antialias Filter Type property or the NISCOPE_ATTR_FLEX_FIR_ANTIALIAS_FILTER_TYPE attribute.
    • 17 Time (t= 0) represents the actual time the edge arrived at the BNC connector on the NI 5922.
    • 18 Internal Sample clock is locked to the Reference clock or derived from the onboard VCXO.
    • 19 Available rates are (60 MS/s) /n where n is an integer value from 4 to 1200. The Sample clock period is n/(60MS/s).
    • 20 Includes the effects of the converter aperture uncertainty and the clock circuitry jitter; excludes trigger jitter.
    • 21 The default value is 10 MHz.
    • 22 Holdoff set to 0.
    • 23 TRIG is an analog edge trigger only.
    • 24 It is possible to exceed these numbers if you fetch records while acquiring data. For more information, refer to the NI High-Speed Digitizers Help.
    • 25 Caused by clock and analog path delay differences. No manual adjustment performed.

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