Table Of Contents

Configure Clock (G Dataflow)

Version:
    Last Modified: March 3, 2017

    Configures the properties for synchronizing the digitizer to an external clock or sending the digitizer's clock output to be used as a synchronizing clock for other devices.

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    input clock source

    The input source for the PLL reference clock to which the digitizer is phase-locked.

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    Note  

    For the NI-5102, input clock source is the source of the board clock. Refer to the Reference (Input) Clock Source property for defined values.

    Name Value Description
    None 0 No input source for the PLL reference clock.
    RTSI Clock 1 Uses the RTSI clock as the input source for the PLL reference clock.
    PFI 0 6 Uses the PFI 0 input as the input source for the PLL reference clock.
    PFI 1 2 Uses the PFI 1 input as the input source for the PLL reference clock.
    PFI 2 3 Uses the PFI 2 input as the input source for the PLL reference clock.
    PXI Clock 4 Uses the clock of a PXI chassis as the input source for the PLL reference clock.
    External 5 Uses an external clock as the input source for the PLL reference clock.
    Clock In 7 Uses the ClkIn connector as the input source for the PLL reference clock.

    Default: None

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    session in

    Identifies a particular instrument session.

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    error in

    Error conditions that occur before this node runs.

    The node responds to this input according to standard error behavior.

    Standard Error Behavior

    Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.

    error in does not contain an error error in contains an error
    If no error occurred before the node runs, the node begins execution normally.

    If no error occurs while the node runs, it returns no error. If an error does occur while the node runs, it returns that error information as error out.

    If an error occurred before the node runs, the node does not execute. Instead, it returns the error in value as error out.

    Default: No error

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    clock sync pulse source

    The line on which either the sample clock or the one-time sync pulse is sent or received. This line should be the same for all devices to be synchronized.

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    Note  
    • For the NI 5102 digitizer, clock sync pulse source is the line on which the sample clock is sent or received.
    • For NI 5112, 5620, 5621, and 5911 digitizers, clock sync pulse source specifies the line on which the one-time sync pulse is sent or received.
    Name Value Description
    RTSI 0 0 Uses the RTSI 0 bus to send or receive the sample clock or the one-time sync pulse.
    RTSI 1 1 Uses the RTSI 1 bus to send or receive the sample clock or the one-time sync pulse.
    RTSI 2 2 Uses the RTSI 2 bus to send or receive the sample clock or the one-time sync pulse.
    RTSI 3 3 Uses the RTSI 3 bus to send or receive the sample clock or the one-time sync pulse.
    RTSI 4 4 Uses the RTSI 4 bus to send or receive the sample clock or the one-time sync pulse.
    RTSI 5 5 Uses the RTSI 5 bus to send or receive the sample clock or the one-time sync pulse.
    RTSI 6 6 Uses the RTSI 6 bus to send or receive the sample clock or the one-time sync pulse.
    PFI 1 7 Uses the PFI 1 terminal to send or receive the sample clock or the one-time sync pulse.
    PFI 2 8 Uses the PFI 2 terminal to send or receive the sample clock or the one-time sync pulse.
    Internal 9 Uses an internal line to send or receive the sample clock or the one-time sync pulse.

    Default: Internal

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    master enabled

    A Boolean value that specifies whether the device is a master or a slave.

    The master device is typically the originator of the trigger signal and the clock sync pulse. For a standalone device, set this parameter to False.

    True Sets the specified device as a master.
    False Sets the specified device as a slave.
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    output clock source

    The output source for the PLL reference clock to which another digitizer's sample clock can be phase-locked.

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    session out

    Passes the instrument handle to the next node in the program. This parameter has the same value as session in.

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    error out

    Error information.

    The node produces this output according to standard error behavior.

    Standard Error Behavior

    Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.

    error in does not contain an error error in contains an error
    If no error occurred before the node runs, the node begins execution normally.

    If no error occurs while the node runs, it returns no error. If an error does occur while the node runs, it returns that error information as error out.

    If an error occurred before the node runs, the node does not execute. Instead, it returns the error in value as error out.

    Where This Node Can Run:

    Desktop OS: Windows

    FPGA: Not supported


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