You may be able to use the Scan Interface for supported individual modules even if the chassis you are using is in FPGA Interface programming mode or does not support Scan Interface programming mode. First you must let LabVIEW discover the modules in the chassis and download a compiled bitfile to the chassis. Using modules that require the high-speed interface, such as the NI 951x, may also require a downloaded compiled bitfile. You must have the LabVIEW FPGA module installed to compile bitfiles for the FPGA.
After setting up your project, discovering modules, and downloading the bitfile to the chassis, you can use modules under the FPGA target in FPGA Interface programming mode and use modules under the Real-Time Scan Resources item in Scan Interface programming mode.
If you have both the LabVIEW Real-Time Module and the LabVIEW FPGA Module installed, you can create user-defined I/O variables to transfer custom I/O data between FPGA VIs and RT VIs. You can also synchronize the execution of code in FPGA VIs and RT VIs.
If the chassis is in FPGA Interface programming mode, you must always use the Open FPGA VI Reference function to download a compiled bitfile to the FPGA before using modules that are under the Real-Time Scan Resources item. You must ensure that the bitfile is running on the FPGA before accessing those modules.
There is a short delay between the time when the Open FPGA VI Reference function finishes running and the time when user-defined variables and modules under the Real-Time Scan Resources item return valid data. If you have user-defined variables in your VI, run the Open FPGA VI Reference function and then read the variables in a loop until they return no errors.
The FPGA VI in the example procedure contains no FPGA code. The only purpose of this FPGA VI is to download to a module bitfile to the chassis. The module bitfile specifies the types and slot locations of all modules in the chassis. If you have LabVIEW FPGA code to execute in your application, you include it in the FPGA VI. When you compile and run the RT VI, it downloads the module bitfile and all FPGA code to the chassis.