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Synchronization Overview

    Last Modified: May 17, 2017

    Synchronization occurs between all baseband transmitters and baseband receivers in your system so that generation and acquisition can begin on the FPGA during the same cycle. For example, in the bidirectional single-input, single-output (SISO) system, the receiver baseband and the transmitter baseband are synchronized.

    In systems with multiple baseband receivers, the baseband receivers can be synchronized so that they are aligned at analog-to-digital (ADC) conversion. This results in very small channel-to-channel skew.

    Before attempting to synchronize your mmWave Transceiver System and mmWave radio heads, notice the following caveats:

    • Synchronization does not account for differences in analog signal paths. For example, there might be some variation between the PXIe-3620 RF Upconverter and Downconverter Modules, the cables, and the mmWave radio heads that synchronization will not account for.
    • Synchronization does not account for data pipeline delays that occur before or after the synchronization VIs.
    • Sources of error, such as common clock propagation delay, cabling and cable lengths, analog delays in the FPGA, and skew/jitter in the common clock, can affect frequency and phase relationships within the system.

    To synchronize across multiple chassis, you must use a PXIe-6674T Synchronization Module.


    NI-mmWave example code does not configure the PXIe-6674T.

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