Performs Viterbi soft decision decoding on a convolutionally encoded bit stream using a specified code rate. The code rate is equal to the ratio of the data word length to the code word length.
Bit metrics for quantized demodulated BPSK symbol data. These demodulated BPSK symbols are quantized to n _{ soft } bits of precision, such that an integer value of 0 represents a strong logic 0 and a value of 2^{ n } _{ soft } represents a strong logic 1.
To generate integer-valued quantized BPSK demodulated data from the Modulation nodes, decimate and quantize the oversampled data at the output of the PSK demodulator/matched filter.
For higher-order M-PSK/QAM schemes, convert the I/Q symbol values into corresponding quantized bit metrics using a suitable algorithm/heuristic.
Default: 1
The convolutional code rate, which is a ratio of k/n, where k is the input data word length and n is the output code word length.
Name | Description |
---|---|
1/2 | Supports constraint lengths of 3,4,5,6,7,8,9,10,11,12,13,14,15,16,17 |
1/3 | Supports constraint lengths of 3,4,5,6,7,8,9,10,11,12,13,14 |
1/4 | Supports constraint lengths of 3,4,5,6,7,8,9,10,11,12,13,14 |
2/3 | Supports constraint lengths of 2,3,4,5,6 |
3/4 | Supports constraint lengths of 2,3,4 |
Default: 1/2
The maximum number of encoded bits that can be affected by a single input bit. This value represents (1 + maximal memory order), where maximal memory order refers to the length of the longest shift register chain in the convolutional encoder.
Default: 3
The initial parent state for the decode operation. When reset? is set to TRUE, the trellis structure is set to this state, thereby initializing the Viterbi decoding operation. On the first call to this node, and thereafter when reset? is set to FALSE, the survivor state from the previous iteration is used to continue performing Viterbi decoding and this parameter is ignored.
Default: 0
Error conditions that occur before this node runs.
The node responds to this input according to standard error behavior.
Standard Error Behavior
Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.
Default: No error
The number of trellis stages used in the Viterbi decoding process.
Default: 15
The number of bits used for quantizing the BPSK modulated symbols to integers.
Default: 1
A Boolean that determines whether the internal state of the decoder is cleared.
TRUE | Clears any buffered bits from previous iterations. Also initializes the Viterbi algorithm to start decoding from initial state. The relationship of the length of output bit stream, L _{ out }, to the length of input bit stream, L _{ in }, is described by the following equation: L _{ out } = k × [floor(L _{ in }/n) - D] where k is the input data word length, n is the output data word length, and D is the decoder traceback depth in symbols. |
FALSE | Continues decoding from the previous iteration. The length of output bit stream is given by the following equation: L _{ out } = k × floor(L _{ in }/n). |
If the length of the encoded bit stream is L _{ in }, and reset? is set to TRUE, the Viterbi decoding algorithm (for a rate k/n code) returns a total of L _{ out } = k×[floor(L _{ in }/n)-D] decoded bits in a single iteration, implying that a total of k×D message bits are buffered inside the node. To recover the entire message of length k×floor[L _{ in }/n] in a single call to MT Convolutional Decoder with reset? set to TRUE, choose one of the following options:
Default: TRUE
Bit sequence decoded by this node.
The value for the k(K-1) shift registers as the right-aligned (least significant) k(K-1) bits when this node completes execution, where K is the constraint length and k is the data word length in bits.
Error information.
The node produces this output according to standard error behavior.
Standard Error Behavior
Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported
Web Server: Not supported in VIs that run in a web application