Samples a signal and holds it for a specified number of calls to this node.
A Boolean or a Boolean array that specifies the initialization of the internal state of the node.
|True||Resets the internal state of the node by returning the value of input as output and reading the initial value of hold time in cycles.|
|False||Does not reset the internal state of the node.|
This node automatically initializes the internal state to zero on the first call and runs continuously until this input is True.
During the hold time, the node ignores new input values.
This input accepts a double-precision, floating-point number or an array of double-precision, floating-point numbers.
Number of calls to the node between updates to output.
This input accepts a 64-bit unsigned integer or an array of 64-bit unsigned integers.
Zero-order hold signal.
output is a sampled version of input with a sample interval of hold time in cycles.
This output can return a double-precision, floating-point number or an array of double-precision, floating-point numbers.
Where This Node Can Run:
Desktop OS: Windows
FPGA: This product does not support FPGA devices
Web Server: Not supported in VIs that run in a web application