# DST (G Dataflow)

Computes the Discrete Sine Transform (DST) of a sequence.

## x

A real vector.

This input can be a 1D or 2D array of double-precision, floating-point numbers.

## DST size

The length of the DST you want to perform.

If DST size is greater than the number of elements in x, this node adds zeros to the end of x to match the size of DST size. If DST size is less than the number of elements in x, this node uses only the leading DST size elements in x to perform the DST. If DST size is less than or equal to zero, this node uses the length of x as the DST size.

This input is available only if you wire a 1D array of double-precision, floating-point numbers to x.

## error in

Error conditions that occur before this node runs.

The node responds to this input according to standard error behavior.

Standard Error Behavior

Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.

error in does not contain an error error in contains an error
If no error occurred before the node runs, the node begins execution normally.

If no error occurs while the node runs, it returns no error. If an error does occur while the node runs, it returns that error information as error out.

If an error occurred before the node runs, the node does not execute. Instead, it returns the error in value as error out.

Default: No error

## DST{x}

The DST of the input sequence.

## error out

Error information.

The node produces this output according to standard error behavior.

Standard Error Behavior

Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.

error in does not contain an error error in contains an error
If no error occurred before the node runs, the node begins execution normally.

If no error occurs while the node runs, it returns no error. If an error does occur while the node runs, it returns that error information as error out.

If an error occurred before the node runs, the node does not execute. Instead, it returns the error in value as error out.

## Algorithm Definition for 1D DST

The one-dimensional Discrete Sine Transform DST{x} of a 1D array x is defined as:

${Y}_{k}=\underset{n=0}{\overset{N-1}{\sum }}{x}_{n}\mathrm{sin}\frac{\pi \left(k+1\right)\left(n+1\right)}{N+1},\text{\hspace{0.17em}}\text{\hspace{0.17em}}\text{\hspace{0.17em}}k=0,\text{\hspace{0.17em}}1,\text{\hspace{0.17em}}2,\text{\hspace{0.17em}}...,\text{\hspace{0.17em}}N-1$

where

• N is the length of the input sequence x
• yk is the kth element of DST{x}
• xn is the nth element of x

This node applies a fast DST algorithm instead of calculating the Discrete Sine Transform directly. This node implements the fast DST algorithm using an FFT-based technique.

## Algorithm Definition for 2D DST

The two-dimensional Discrete Sine Transform DST{x} of a 2D array x is defined as:

$y\left(u,\text{\hspace{0.17em}}v\right)=\underset{m=0}{\overset{M-1}{\sum }}\underset{n=0}{\overset{N-1}{\sum }}x\left(m,\text{\hspace{0.17em}}n\right)\mathrm{sin}\frac{\pi \left(u+1\right)\left(m+1\right)}{M+1}\mathrm{sin}\frac{\pi \left(v+1\right)\left(n+1\right)}{N+1}$

where

• M is the number of rows of x
• N is the number of columns of x
• x(m, n) is the element of the input matrix x with row number m and column number n
• y(u, v) is the element of the output matrix DST{x} with row number u and column number v

This node performs a two-dimensional DST using the following two steps:

1. Perform a one-dimensional DST row-by-row on x. The output is Y'.
2. Perform a one-dimensional DST column-by-column on Y'. The output is DST{x}.

Where This Node Can Run:

Desktop OS: Windows

FPGA: This product does not support FPGA devices