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Quantizer (G Dataflow)

Version:
    Last Modified: March 31, 2017

    Quantizes a continuous input signal to discrete states.

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    input

    Input signal.

    This input accepts a double-precision, floating-point number or an array of double-precision, floating-point numbers.

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    quantization interval

    Height of the quantization levels.

    This input accepts a double-precision, floating-point number or an array of double-precision, floating-point numbers.

    Default: 1

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    type of quantization

    Type of the quantizer.

    This input accepts a ring or an array of rings.

    Name Value Description
    Mid-tread 0 Uses a mid-tread type quantizer.
    Mid-riser 1 Uses a mid-riser type quantizer.
    Round towards +Inf 2 Rounds the input elements to the nearest integer towards +Inf.
    Round towards -Inf 3 Rounds the input elements to the nearest integer towards -Inf.
    Round towards zero 4 Rounds the input elements to the nearest integer towards zero.
    Round away from zero 5 Rounds the input elements to the nearest integer away from zero.

    Algorithm Definition for the Mid-Tread Quantizer

    The mid-tread quantizer uses the following equation to quantize the input signal.

    y = [ u Δ ] * Δ

    where

    • y is the output signal
    • u is the input signal
    • Δ is the quantization interval

    Algorithm Definition for the Mid-Riser Quantizer

    The mid-riser quantizer uses the following equation to quantize the input signal.

    y = u Δ 0.5 * Δ

    where

    • y is the output signal
    • u is the input signal
    • Δ is the quantization interval

    Default: Mid-tread

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    output

    Output signal.

    This output can return a double-precision, floating-point number or an array of double-precision, floating-point numbers.

    Where This Node Can Run:

    Desktop OS: Windows

    FPGA: This product does not support FPGA devices


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