Table Of Contents

Compiling FPGA Code

Last Modified: February 13, 2019

To run code on an FPGA, you must compile the FPGA code into a bitfile that you then deploy to the FPGA. The bitfile contains binary data that describes how to configure the FPGA circuit so that it performs the same function as the code in the FPGA VI.

Before you build a bitfile, ensure your FPGA application and all dependencies are targeted to an FPGA device in SystemDesigner.

Complete the following steps to compile your FPGA code into a bitfile:


Building a bitfile can take a significant amount of time, depending on the size of the VI, the processor speed, and the amount of memory in the computer on which you are building the bitfile. NI recommends that you test and debug an FPGA VI before compiling it into a bitfile.

  1. In the Application document, on the Document tab, enter information about your application in the Details section. Configure the build settings in the Build section.
  2. Click File»Save all.
  3. Optional: Click FPGA preferences and set up the FPGA compiler.
  4. Click Build ( ).
  5. If a warning appears, click Continue. The bitfile begins compiling immediately and the Build Queue tab shows the status of current and completed compilations.

    Do not change any code in your FPGA application during the diagram analysis stage of compilation. Any changes you make to code during the diagram analysis stage may be reflected in the bitfile. If you want to continue working on code while you wait for the compilation to finish, do so after the diagram analysis stage.

Monitor the compilation of your bitfile to determine whether you need to make changes to your code.

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