Clock that controls the loop.
Current loop iteration count. The loop count always starts at zero for the first iteration. If the iteration count exceeds 2,147,483,647, or 231-1, the iteration terminal remains at 2,147,483,647 for all further iterations. If you need to keep count of more than 2,147,483,647 iterations, you can use shift registers with a greater integer range.
Determines whether to continue executing the loop. The loop runs infinitely by default. To specify whether the loop stops for a TRUE or FALSE Boolean value, configure the continuation behavior.
Point through which data enters the structure.
Where This Node Can Run:
Desktop OS: Windows
FPGA: All devices (only within an Optimized FPGA VI)