Performs LDPC encoding on the input bit stream based on the parity check matrix. The parity check matrix can be generated by MT LDPC Generate Regular Parity Check Matrix, MT LDPC Generate Irregular Parity Check Matrix, or you can provide it as an input to MT LDPC Encoder.
The sparse parity check matrix generated by MT LDPC Generate Regular Parity Check Matrix or MT LDPC Generate Irregular Parity Check Matrix. You can also set a parity check matrix that is not rank deficient in this parameter.
The incoming bit stream to be mapped to LDPC symbols.
Error conditions that occur before this node runs. The node responds to this input according to standard error behavior.
Default: no error
A Boolean that determines whether the internal state of the encoder is cleared.
|TRUE||Clears any buffered bits from previous iterations.|
|FALSE||Continues encoding from the previous iteration. Any buffered bits from the previous iteration are added to the beginning of the input bit stream prior to encoding.|
The preprocessed parity check matrix that is used by the encoder for encoding. You must provide this parity check matrix to the decoder.
Error information. The node produces this output according to standard error behavior.
Low-density parity check (LDPC) is a linear error-correcting coding scheme that uses a parity check matrix that provides only a few ones with respect to a much larger number of zeros.
The main advantage of the parity check matrix is that it provides a performance that is almost equal to the capacity of many different channels and linear time complex algorithms for decoding. Furthermore, parity check matrices are suited for implementations that make heavy use of parallelism.
An LDPC code is a block code that has a parity check matrix H, every row and column of which is sparse. A Regular Gallager Code is an LDPC code in which every column of H has a weight, j, and every row has a weight, k. Regular Gallager codes are constructed at random, subject to these constraints.
If the number of ones per column or row is not constant, the code is an irregular LDPC code. Usually, irregular LDPC codes outperform regular LDPC codes.
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported