Table Of Contents
Data Port (Multirate Dataflow)
Version:
Last Modified: August 28, 2017
Transfers data between a Multirate diagram and a VI.
On a Multirate diagram targeted to an FPGA, the port transfers data using a FIFO.
On a Multirate diagram targeted to the host or controller, the port transfers data directly without using a FIFO.
Where This Node Can Run:
Desktop OS: Windows
FPGA: All devices
Web Server: Not supported in VIs that run in a web application