When converting your floating-point data types to fixed-point for implementation on an FPGA, you may need to adjust the fixed-point data types to meet your application requirements.
Before you can refine converted fixed-point data types in your design, you must convert the floating-point data types in your application to fixed-point. Refer to Converting Floating-Point Data Types to Fixed-Point Using Suggestions for help converting the data types in your design.
If you are able to determine which data types to modify in order to meet your precision and resource requirements, you can modify them using the Edit Type button. If you need to increase the precision of your code, add bits to either the integer or fractional component of the data type depending on your needs. If your code meets your precision needs, but you want to conserve resources, you can remove bits from the data type.
If you have Show Numeric Types enabled in the Annotations drop-down menu of the editor, you can also click a data type annotation on the diagram to modify that data type.
However, if you have trouble determining which data types to modify, try modifying the data types of groups of objects in order from diagram inputs to diagram outputs:
Consider the following options before proceeding:
|Your fixed-point output does not sufficiently represent your floating-point output.
||Proceed to step 2.
|Your fixed-point output sufficiently represents your floating-point output, but you need to reduce resource usage.
||Proceed to step 6.
Select all of the diagram inputs from the table within the Convert to Fixed-Point tab.
Click Edit Type and add bits to the fractional component of the fixed-point data type. After modifying data types, the values in the table become outdated.
Run the testbench VI to recalculate the signal-to-noise ratio (SNR), overflow, and underflow values. LabVIEW updates these values in the table within the Convert to Fixed-Point tab.
If the output of your fixed-point design still does not meet the precision requirements of your application, repeat steps 1 through 4 for each group of downstream nodes until the output of your fixed-point design meets the precision requirements of your application.
For example, the following image shows the order to add bits to the data types of objects on a diagram:
After the output of your fixed-point design meets the precision requirements of your application, remove a few bits from each group of nodes using the same pattern as in steps 2 through 5. Removing bits helps to conserve resources on the FPGA.
Remove only one to two bits at a time to make sure you do not drop below your precision requirements when removing bits.
After the output of your fixed-point design meets both the precision and resource requirements of your application, you can begin to map out your application for use with hardware.