Table Of Contents

Introduction to FPGA Resources

Last Modified: January 11, 2018

Every FPGA has a set number of programmable logic, routing, I/O, and memory resources. The compiler uses these resources to implement code on the FPGA.

The programmable resources on an FPGA are located at regular intervals across the chip, which allows for short paths between the resources. Short paths between resources reduce the minimum execution time that code running on the FPGA target requires. Since there are multiple instances of each resource on an FPGA, multiple concurrent processes can run on the same device at the same time, while minimizing resource conflicts. The following illustration shows a simplified example of programmable resources on an FPGA.

  1. Configurable logic blocks (CLBs)—Basic repeating units of logic on the FPGA.
  2. Programmable routing—Interconnecting wires that join CLBs together to build complex logic. Programmable routing also joins I/O blocks to CLBs and joins CLBs to memory resources.
  3. I/O resources—Analog and digital inputs and outputs that connect the FPGA to external signals.

An FPGA must receive configuration instructions before it can perform any computation. The compiler generates configuration instructions for the FPGA that implements your code. When you compile your application, the compiler arranges the programmable resources on the FPGA to create a circuit that performs the following actions as shown in the illustration above:

  1. Receives inputs from the I/O blocks
  2. Processes the inputs using CLBs
  3. Passes the processed inputs back to the I/O blocks as outputs

The compiler uses different combinations of available FPGA resources to implement the same code depending on the performance directives you set in your code and the resources available on your FPGA.


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