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Read Handshake Without Acknowledge (Clock-Driven Logic)

Last Modified: September 14, 2017

Reads the data element from a handshake item without acknowledging the transfer, meaning that the data remains in the handshake item.Use this node in addition to the Acknowledge Handshake node as an alternative to the Read Handshake node to read one element of data if you need to control when the node acknowledges the data transfer.

If ready for output is False during a given clock cycle, output valid returns False during that clock cycle.


reference in

Reference to a handshake item. You can wire a handshake control, handshake constant, or the reference out terminal of another Handshake node to reference in.


ready for output

A Boolean that determines whether downstream nodes are ready for this node to return a new value. The default is True. Use a Feedback Node to wire the ready for input output of a downstream node to this input.

True Downstream nodes are ready for this node to return a new value.
False Downstream nodes are not ready for this node to return a new value.

reference out

The same handshake reference wired into this node.



Data transferred using the handshake item.


output valid

Boolean value that indicates whether this node computes a result that downstream nodes can use.

Wire this output to input valid of a downstream node to transfer data from the node to the downstream node.

True Downstream nodes can use the result this node computes.
False This node returns an undefined value that downstream nodes cannot use.

This node may return different undefined values when executed in simulation mode versus when executed on hardware.

Where This Node Can Run:

Desktop OS: none

FPGA: All devices

Web Server: Not supported in VIs that run in a web application

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