Table Of Contents

Matrix Transpose (Clock-Driven Logic)

Last Modified: July 25, 2018

Transposes a matrix.

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x

The matrix to manipulate.

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input valid

Boolean value that describes whether the next data point has arrived for processing. Wire the output valid output of an upstream node to this input to transfer data from the upstream node to this node.

True The next data point has arrived for processing.
False The next data point has not arrived for processing.
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ready for output

Boolean value that defines whether downstream nodes are ready for this node to return a new value. Use a Feedback Node to wire the ready for input output of a downstream node to this input of the current node.

True Downstream nodes are ready for this node to return a new value.
False Downstream nodes are not ready for this node to return a new value.
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Note  

If this input is False during a cycle, the output valid output returns False during that cycle.

Default: True

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y

The result of the operation

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operation overflow

A Boolean that indicates whether the theoretical computed value exceeds the valid range of the output data type.

TRUE The theoretical computed value exceeds the valid range of the output data type.
FALSE The theoretical computed value does not exceed the valid range of the output data type.
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output valid

Boolean value that indicates whether this node computes a result that downstream nodes can use.

Wire this output to input valid of a downstream node to transfer data from the node to the downstream node.

True Downstream nodes can use the result this node computes.
False This node returns an undefined value that downstream nodes cannot use.
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Note  

This node may return different undefined values when executed in simulation mode versus when executed on hardware.

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ready for input

Boolean value that indicates whether this node is ready to accept new input data.

Use Feedback Node to wire this output to ready for output of an upstream node.

True The node is ready to accept new input data.
False The node is not ready to accept new input data.
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Note  

If this output returns False during a given cycle, this node discards any data that other nodes send to this node during the following cycle. This node discards the data even if input valid is True during the following cycle.

Where This Node Can Run:

Desktop OS: none

FPGA: All devices

Web Server: Not supported in VIs that run in a web application


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