High Throughput Rectangular to Polar (Clock-Driven Logic)

X value of the rectangular coordinates.

This input supports only scalar values of the fixed-point data type.

Note  

If you wire an unsigned value to this terminal that has a word length of 64 bits, LabVIEW coerces the word length to be 63 bits and displays a coercion dot on the wire.

Y value of the rectangular coordinates.

This input supports only scalar values of the fixed-point data type.

Note  

If you wire an unsigned value to this terminal that has a word length of 64 bits, LabVIEW coerces the word length to be 63 bits and displays a coercion dot on the wire.

A Boolean that specifies whether the next data point has arrived for processing. Wire the output valid output of an upstream node to this input to transfer data from the upstream node to this node.

A Boolean that specifies whether downstream nodes are ready for this node to return a new value. Use a Feedback Node to wire the ready for input output of a downstream node to this input of the current node.

Note  

If this input is False during a given cycle, output valid returns False during that cycle.

Default: TRUE

Magnitude.

Phase in pi radians, which use fewer FPGA resources than radians. To convert this value into radians, divide phase by pi.

A Boolean that indicates whether this node has computed a result that downstream nodes can use. Wire this output to the input valid input of a downstream node to transfer data from the node to the downstream node.

A Boolean that indicates whether this node is ready to accept new input data. Use a Feedback Node to wire this output to the ready for output input of an upstream node.

Note  

If this output returns False during a given cycle, this node discards any data that other nodes send to this node during the following cycle. This node discards the data even if input valid is True during the following cycle.