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Color Correction Matrix (Clock-Driven Logic)

Last Modified: August 28, 2017

Corrects color operations, such as white balance, color cast, brightness, or contrast in an RGB image.The implementation is a 3x3 programmable coefficient matrix multiplier with offset compensation.

On the Item tab, click Configure Xilinx IP to configure inputs and outputs for this node.

Need License: Yes

Interface: AXI4-Stream, AXI4-Lite

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Where This Node Can Run:

Desktop OS: none

FPGA: All devices

Web Server: Not supported in VIs that run in a web application


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