Table Of Contents

Read Memory (Clock-Driven Logic)

Version:
Last Modified: February 27, 2020

Reads from memory available on the FPGA target.

If you implement the memory item using block memory or look-up tables, you can read data only from the clock domain in which the memory is written. In these implementations, optimize your code by using only one writer node and one reader node for each memory item. To read and write in a separate clock domain, use FIFOs or registers.

Programming Patterns

Transferring Data Using a Memory Item

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reference in

Reference to the memory item.

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address

Memory address to read from.

The valid address range depends on the requested number of elements you specify when creating the input memory item. For example, if you specify a requested number of elements of 65536, the valid address range is 0–65535. If address exceeds the address range, this node returns an error.

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error in

Error conditions that occur before this node runs.

The node responds to this input according to standard error behavior.

Standard Error Behavior

Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.

error in does not contain an error error in contains an error
If no error occurred before the node runs, the node begins execution normally.

If no error occurs while the node runs, it returns no error. If an error does occur while the node runs, it returns that error information as error out.

If an error occurred before the node runs, the node does not execute. Instead, it returns the error in value as error out.

Default: No error

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reference out

Reference to the memory item.

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data

Data retrieved from the specified address of the memory item.

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error out

Error information.

The node produces this output according to standard error behavior.

Standard Error Behavior

Many nodes provide an error in input and an error out output so that the node can respond to and communicate errors that occur while code is running. The value of error in specifies whether an error occurred before the node runs. Most nodes respond to values of error in in a standard, predictable way.

error in does not contain an error error in contains an error
If no error occurred before the node runs, the node begins execution normally.

If no error occurs while the node runs, it returns no error. If an error does occur while the node runs, it returns that error information as error out.

If an error occurred before the node runs, the node does not execute. Instead, it returns the error in value as error out.

Configuring Memory for Read and Write Access

On the Item tab, use the Memory interfaces option to configure the interface (A or B) that this node reads from. Depending on the read/write access you configured when creating the memory using the Create Memory node, select an appropriate interface using the following guidelines:

  • If the memory has both read and write access, select Read A.
  • If the memory is read-only, which means dual-port read access, select Read A or Read B.

Where This Node Can Run:

Desktop OS: none

FPGA: All devices

Web Server: Not supported in VIs that run in a web application


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