Table Of Contents

High Throughput Multiply (Clock-Driven Logic)

Last Modified: August 28, 2017

Computes the product of two values.

To enable handshaking, select the Four wire checkbox in the Item tab.

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x

Multiplicand.

This input accepts the following data types:

  • Fixed-point number
  • Complex fixed-point number
  • 1D array of fixed-point numbers
  • 1D array of complex fixed-point numbers
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y

Multiplicator.

This input accepts the following data types:

  • Fixed-point number
  • Complex fixed-point number
  • 1D array of fixed-point numbers
  • 1D array of complex fixed-point numbers
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input valid

Boolean value that specifies whether the next data point is valid and can be processed.

Wire output valid of an upstream node to this input to transfer data from the upstream node to this node.

This input is available only when you select the Four wire checkbox in the Item tab.

True The data point is valid and can be processed.
False The data point is not valid.
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ready for output

Boolean value that specifies whether downstream nodes are ready for this node to return a new value.

Use Feedback Node to wire ready for input of a downstream node to this input of the current node. If this input is False during a given cycle, output valid returns False during that cycle.

This input is available only when you select the Four wire checkbox in the Item tab.

True The downstream node is ready for the next data point.
False The downstream node is not ready for the next data point.

Default: True

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operation overflow

Boolean value that indicates whether the theoretical computed value exceeds the valid range of the output data type.

True The theoretical computed value exceeds the valid range of the output data type.
False The theoretical computed value is within the valid range of the output data type.

This output can return a Boolean or a 1D array of Booleans.

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x*y

Product of x and y.

This output can return one of the following data types:

  • Fixed-point number
  • Complex fixed-point number
  • 1D array of fixed-point numbers
  • 1D array of complex fixed-point numbers

When either x or y is a complex fixed-point number, x*y is a complex fixed-point number.

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output valid

Boolean value that indicates whether this node has computed a result that downstream nodes can use.

Wire this output to input valid of a downstream node to transfer data from the node to the downstream node.

This output is available only when you select the Four wire checkbox in the Item tab.

True The node has computed a result that downstream nodes can use.
False The node has not computed a result that downstream nodes can use and returns an undefined value.
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Note  

This node may return different undefined values when executed in simulation mode versus on hardware.

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ready for input

Boolean value that indicates whether this node is ready to accept new input data.

Use Feedback Node to wire this output to ready for output of an upstream node.

This output is available only when you select the Four wire checkbox in the Item tab.

True The node is ready to accept new input data.
False The node is not ready to accept new input data.

Node Behaviors When x and y Are Arrays

When both x and y are arrays, this node performs calculation on the two arrays element by element. If the two arrays are of different sizes, this node performs calculation on the first N elements, where N is the number of elements of the smaller array. When one input is an array and the other is a scalar, this node performs calculation on each element of the array with the scalar.

When Does This Node Discard Data

If ready for input returns False during a given cycle, this node discards any data that other nodes send to this node during the following cycle. This node discards the data even if input valid is True during the following cycle.

How to Achieve Desired Clock Rate When x and y Are Complex Fixed-Point Numbers

When both x and y are complex fixed-point numbers, you may experience a reduced clock rate at compile time. If you cannot achieve your desired clock rate using this node, you can attempt the following steps:

  1. Enabling handshaking by selecting the Four wire checkbox in the Item tab.
  2. Increase the number of Pipelining stages in the Item tab.

If you still cannot achieve your desired performance, try implementing the same logic using Xilinx IP nodes.

Improving Timing Performance with Pipelining

You can improve the timing performance of this node on an FPGA target by adjusting the number of pipelining stages. The functionality of a pipelined multiplier is equivalent to a non-pipelined multiplier cascaded by a certain number of registers. The number of registers equals the number of pipelining stages.

Improving Maximum Clock Rate with Pipelining

In general, increasing the number of pipelining stages also increases the maximum clock rate this node can achieve. However, the actual clock rate depends on many considerations, including the following factors:

  • The FPGA target you use
  • The size of the multiplier
  • The rounding and overflow modes you select in the fixed-point configuration for the node
  • The mode you select for Resource in the Pipelining option section of the Item tab.
  • Other FPGA logic besides the multiplier

Where This Node Can Run:

Desktop OS: none

FPGA: All devices

Web Server: Not supported in VIs that run in a web application


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