Table Of Contents

Write ATR Register (G Dataflow)

Last Modified: January 9, 2017

Writes to the ATR register of a daughterboard. The ATR register provides advanced configuration for a daughterboard. Do not continue to configure the daughterboard after writing to the ATR registers because the ATR registers may be overwritten and these configurations will be lost.

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scope

is the channel to operate on. Valid options are rx/RF 0, rx/RF 1, tx/RF 0, and tx/RF 1. For this node, scope is used to determine which daughterboard to update the ATR state of and whether to update the power and mixer of Rx or Tx.

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niUsrpRio session

Object created by the Open node and used as the session handle for the USRP RIO nodes.

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atr register

The specific ATR register to write to. The registers correspond to the four states each daughterboard supports. The daughterboard state is set based on whether Rx and Tx are enabled or disabled, using the Enable Front End node. It is safe to call the Enable Front End node after you write to the ATR registers.

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atr register value

32-bit value to program an ATR register with.

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niUsrpRio session (out)

The niUsrpRio session used in all subsequent USRP RIO host nodes.

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atr register

The specific ATR register to write to. The registers correspond to the four states each daughterboard supports. The daughterboard state is set based on whether Rx and Tx are enabled or disabled, using the Enable Front End node. It is safe to call the Enable Front End node after writing to the ATR registers.

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error in

Error conditions that occur before this node runs. The node responds to this input according to standard error behavior.

Default: No error

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error out

Error information. The node produces this output according to standard error behavior.

Where This Node Can Run:

Desktop OS: Windows

FPGA: Not supported


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