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Advanced Configure ADC Gain (G Dataflow)

Last Modified: January 9, 2017

Updates a specified ATR Register state for advanced daughterboard ADC gain configuration. ADC Gain has a range of 0 dB to 6 dB with a 0.5 step.

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scope

The channel to operate on. Valid options are rx/RF 0, rx/RF 1, tx/RF 0, and tx/RF 1. For this node, scope is used to determine which daughterboard to update the ATR state of.

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ADC Gain

The gain setting of the daughterboard ADC. This has a range of 0 dB to 6 dB with a 0.5 step.

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niUsrpRio session

Object created by the Open node and used as the session handle for the USRP RIO nodes.

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niUsrpRio session (out)

The niUsrpRio session used in all subsequent USRP RIO host nodes.

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error in

Error conditions that occur before this node runs. The node responds to this input according to standard error behavior.

Default: No error

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error out

Error information. The node produces this output according to standard error behavior.

Where This Node Can Run:

Desktop OS: Windows

FPGA: Not supported


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