Waits until the value of the operating system's tick timer becomes a multiple of the specified tick multiple. A single tick represents one nanosecond. Use this node to synchronize activities.
The number that tick timer value must be a multiple of. Wiring a value of 0 to this parameter forces the current thread to yield control of the CPU.
Value of the operating system's tick timer after the wait.
When using Wait Until Next Multiple inside a loop, the first loop iteration will be shorter than subsequent iterations. This is because the very first time the loop executes, the time it waits is dependent on the time, with respect to the system millisecond clock, that the loop began to execute.
For example, consider a loop that contains a Wait Until Next ms Multiple node with 10 ms wired to millisecond multiple. This loop begins to execute when the value of the system millisecond clock is 112 ms. The first loop iteration lasts only 8 ms, until the value of the system millisecond clock is 120 ms (a multiple of 10), at which time the loop begins the second iteration. Each subsequent loop iteration begins every 10 ms.
When specifying a value for the input of Wait Until Next Multiple, ensure that the value is greater than the time required to execute the code inside the loop. If a loop contains code that takes longer to execute than the time specified, Wait Until Next Multiple has no effect on the execution speed of the loop.
Where This Node Can Run:
Desktop OS: Windows
FPGA: All devices (only within an Optimized FPGA VI)