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To Signed 8-bit Integer (G Dataflow)

Last Modified: January 23, 2017

Converts a number to an 8-bit integer in the range -128 to 127.

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number

An input to this operation.

This input supports any data type that contains only numbers, such as scalar numbers, arrays or clusters of numbers, and arrays of clusters of numbers.

Data Type Changes on FPGA

When you add this node to a document targeted to an FPGA, this input has a default data type that uses fewer hardware resources at compile time.

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8-bit integer

Result of the conversion.

This output assumes the same data type structure as number.

Rounding Behavior for Floating-Point Values

This node rounds all floating-point numeric values to the nearest integer. If the fractional part of the floating-point value is .5, the node rounds the value to the nearest even integer. For example, the node rounds 13.5 to 14 and rounds 14.5 to 14.

Wrapping Behavior for Out-of-Range Values

If this node receives an input value that falls outside of the range of values that the output can represent, the node returns a value that wraps to the other end of the range. This differs from the behavior for nodes that convert values to unsigned integers.

number 8-bit integer (range: -128 to 127) Comments
0 0 number is within the allowable range, so no value change occurs.
1 1 Same as above.
... ... ...
126 126 Same as above.
127 127 number is the maximum allowable value, so no value change occurs.
128 -128 number exceeds the maximum allowable value by 1, so the node returns the first allowable value at the bottom of the range.
129 -127 number exceeds the maximum allowable value by 2, so the node returns the second allowable value at the bottom of the range.
-127 -127 number is within the allowable range, so no value change occurs.
-128 -128 number is the minimum allowable value, so no value change occurs.
-129 127 number undershoots the minimum allowable value by 1, so the node returns the first allowable value at the top of the range.
-130 126 number undershoots the minimum allowable value by 2, so the node returns the second allowable value at the top of the range.
13.7 14 The node rounds 13.7 up to 14 because 14 is the nearest integer.
13.5 14 The node rounds 13.5 up to 14 because 14 is the nearest even integer.
14.5 14 The node rounds 14.5 down to 14 because 14 is the nearest even integer.

Where This Node Can Run:

Desktop OS: Windows

FPGA: All devices (only within an Optimized FPGA VI)


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