# Pattern Generator (Periodic Sinc) (G Dataflow)

Version:

Generates a signal containing a periodic sinc pattern.

## amplitude

Amplitude of the pattern.

Default: 1

## delay

Shifts the pattern in the time axis.

Default: 0

## order

Number of zero crossings between two adjacent peaks, which is equal to this input minus 1.

Default: 9

## error in

Error conditions that occur before this node runs. The node responds to this input according to standard error behavior.

Default: No error

## dt

Sampling interval. This input must be greater than zero. If this input is less than or equal to zero, this node sets the output pattern to an empty array and returns an error.

Default: 0.1

## samples

Number of samples in the pattern. If this input is less than 1, the node sets the output pattern to an empty array and returns an error.

Default: 128

## periodic sinc pattern

Output periodic sinc pattern.

## error out

Error information. The node produces this output according to standard error behavior.

## Algorithm for Generating the Periodic Sinc Pattern

If the sequence Y represents periodic sinc pattern, this node generates the pattern according to the following equation:

${y}_{i}=\left\{\begin{array}{c}a{\left(-1\right)}^{k\left(n-1\right)}\\ a\frac{\mathrm{sin}\left(n\left(i\mathrm{\Delta }t-d\right)/2\right)}{n\mathrm{sin}\left(\left(i\mathrm{\Delta }t-d\right)/2\right)}\end{array}\begin{array}{c}i×\mathrm{\Delta }t-d=2k\pi ,k\text{\hspace{0.17em}}\text{is an integer}\\ \text{Otherwise}\end{array}$

for i = 0, 1, 2, ..., N - 1

where

• a is the amplitude
• n is the order
• d is the delay
• N is the samples. A higher value n results in a wider bandwidth.

Where This Node Can Run:

Desktop OS: Windows

FPGA: Not supported