Maps complex-valued phase-shift keying (PSK) symbols to an output bit stream based on a user-specified symbol map.
The incoming complex-valued symbols to be mapped to the output bit stream based on the symbol map.
An ordered array that maps each symbol value to its desired coordinates in the complex plane.
The number of PSK states in the array must be 2 N , where N is the number of bits per symbol. To specify a prebuilt map, unbundle the symbol map element from the PSK system parameters cluster generated by MT Generate PSK System Parameters (M) or MT Generate PSK System Parameters (map).
Type of PSK modulation.
Sets the modulation type to regular PSK.
Rotates the constellation by /M each symbol.
Sets the modulation type to offset quadrature phase-shift keying (OQPSK). This modulation scheme is a form of phase-shift keying in which four different phase angles are used. This scheme is sometimes referred to as staggered quadrature phase-shift keying (SQPSK). For offset PSK, the ideal symbol timing for Q is offset by 1/2 of a symbol period from the ideal symbol timing for I. offset is currently only supported for M= 4.
Carrier phase correction applied to the symbol array prior to mapping. The correction overcomes the starting phase ambiguity during shifted-PSK demodulation.
Use this parameter when the PSK modulation type parameter is set to shifted and the differential PSK parameter is set to disable.
Error conditions that occur before this node runs. The node responds to this input according to standard error behavior.
Default: no error
A value that indicates how the PSK modulation represents symbols.
Differential operation is used to implement PSK formats such as differential quadrature PSK (DQPSK) and /4-DQPSK.
Symbols are represented as constellation points.
Symbols are represented as the transitions between constellation points.
A Boolean that determines whether stored state information is cleared on each call to this node.
When the input bit stream is not comprised of an integer number of symbols, the carryover bits are buffered.
|TRUE||Clears the buffered data, checks the input parameters on a first call, and reflects any change in the input parameter values during subsequent iterations.|
|FALSE||Adds the buffered data to the beginning of data from next iteration, in continuous operations.|
A bit stream with a one-to-one mapping to the input symbols based on the specified symbol map.
Error information. The node produces this output according to standard error behavior.
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported