Performs interleaving by writing the input data into an m (rows) × n (columns) matrix, one row after another. When the matrix is full, this node reads the data, one column after another. Typically, the MT Block Interleave (Matrix) and MT Block DeInterleave are used together.
The input data to be interleaved. Data is processed in blocks of mn, where m is the number of rows and n is the number of columns. If the number of data samples is less than block size mn, the block interleaver does not generate any data if the node is run once. If the data samples are continuously fed in and if the number of data samples is greater than but not a multiple of mn, the block interleaver buffers the remaining samples for use in the next iteration. For example, if m = 3, n = 4, and 27 data samples are specified, this node interleaves two blocks (2×12=24) of data and buffers 3 samples (27-24=3) for use in the next iteration. Data is read in by row and read out by column.
The number of rows of the block interleaver.
The number of columns of the block interleaver.
Error conditions that occur before this node runs. The node responds to this input according to standard error behavior.
Default: no error
A Boolean that determines how this node handles buffered data.
|TRUE||Clears the buffered data, checks the input parameters on a first call, and reflects any change in the input parameter values during subsequent iterations.|
|FALSE||Adds the buffered data to the beginning of data from next iteration, in continuous operations.|
The output of the block interleave operation.
Error information. The node produces this output according to standard error behavior.
The following is a theoretical example of the interleave operation.
If you set data in to be 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,…, with number of rows equal to 3 and number of columns equal to 5, the block will be visualized as shown:
The data is entered by row and read by column, such that, for this example, data out would be 0,5,10,1,6,11,2,7,12,3,8,13,4,9,14.
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported