Performs phase demodulation on the incoming I/Q signal.
The baseband (downconverted) time-domain data for demodulation.
The trigger (start) time of the acquired signal.
Time interval between data points in the acquired signal.
The complex-valued time-domain data array. The real and imaginary parts of this complex data array correspond to the in-phase (I) and quadrature-phase (Q) data, respectively.
A value that indicates how to scale the PM demodulated waveform. You can set this value to 1.0 or to the expected phase deviation of the incoming PM signal for demodulation.
A Boolean that determines whether to enable carrier correction.
|TRUE||Determines a linear correction to the carrier frequency estimate and compensates for it in the FM demodulated waveform.|
|FALSE||Carrier correction is not enabled. Use this option when performing continuous acquisition.|
Error conditions that occur before this node runs. The node responds to this input according to standard error behavior.
Default: no error
A Boolean that determines whether initialization of an internal node state tracks the ending phase.
|TRUE||The node clears the state information about each call.|
|FALSE||The node uses the final phase from the previous call as the starting phase for the next call, ensuring phase continuity between calls.|
The phase-demodulated information signal.
The offset, in hertz (Hz), between the incoming modulated carrier frequency and the estimated carrier frequency. The offset is returned whether carrier correction? is TRUE or FALSE. If the carrier frequency drifts as a function of time, this node calculates the offset by performing a weighted linear fit on the phase information in the I/Q signal, and then taking the slope of this linear fit. You can use this slope to monitor drift in the carrier frequency.
Error information. The node produces this output according to standard error behavior.
This node computes the information signal as a result of the demodulation and returns the data in the PM demodulated waveform.
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported