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Real and Imaginary to Complex (Multirate Dataflow)

Last Modified: January 23, 2017

Creates a complex number from two values in rectangular notation.

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x

An input to this operation.

This input supports scalar numbers and fixed-size 1-dimensional arrays of numbers.

Data Type Changes on FPGA

When you add this node to a document targeted to an FPGA, this input has a default data type that uses fewer hardware resources at compile time.

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y

The y rectangular component of x + yi.

This input supports scalar numbers and fixed-size 1-dimensional arrays of numbers.

Data Type Changes on FPGA

When you add this node to a document targeted to an FPGA, this input has a default data type that uses fewer hardware resources at compile time.

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x + yi

The complex number.

x + yi has the same structure as the input, with complex representation instead of scalar.

Data Type Changes on FPGA

When you add this node to a document targeted to an FPGA, this output has a default data type that uses fewer hardware resources at compile time.

Where This Node Can Run:

Desktop OS: Windows

FPGA: All devices


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