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Data Port (Multirate Dataflow)

Version:
    Last Modified: September 10, 2016

    Transfers data between a Multirate diagram and a VI.

    On a Multirate diagram targeted to an FPGA, the port transfers data using a FIFO.

    On a Multirate diagram targeted to the host or controller, the port transfers data directly without using a FIFO.

    connector_pane_image

    Where This Node Can Run:

    Desktop OS: Windows

    FPGA: All devices


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