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Considerations for Maximizing System Performance for Large Projects

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    Last Modified: June 5, 2017

    Before beginning the design and implementation of a large project, it is important to consider best practices to maximize system performance. A large project is not strictly defined by size, and any application with active build specifications or programs that utilize the application frameworks should consider the suggested practices below.

    Loading, Saving, and Recovering Your Project

    • When opening a project, open the top-level VIs that are used as the direct interface for your application. Wait until the project loads fully by monitoring the usage of your machine’s CPU cores before, and after, opening the project. When core usage returns to prior levels, you can begin to modify the project.
    • If you notice that a change does not update or that VIs appear unexpectedly broken, press Ctrl-Shift-Run button to force recompile the VI. Do not attempt a force recompile while your VI hierarchy is still loading. Force recompile before saving your project.
    • In the event of a crash, copy your project on disk before saving the project from the resulting dialog. This will minimize corruption in a recovered project.

    Hardware Considerations

    • Increasing RAM may improve performance, particularly when working with FPGA compilations. The recommended minimum amount of RAM is 8 GB for simple projects. NI recommends at least 16 GB for projects that include larger FPGA components such as the Application Frameworks.
    • A high performance multi-core processor is ideal for program development and run-time performance.
    • A solid-state drive (SSD) improves performance particularly when launching, saving, and loading projects. An SSD is recommended in applications with active build specifications.

    Software Environment and Performance

    • Consider creating separate projects for different components of your system design. For example, when developing a bitfile for FPGA applications, it is possible to develop and compile in a separate project from the host code. Developing for multiple targets can also be separated into multiple projects as needed.
    • To maximize performance, delete unused targets. For top-level FPGA VIs that will be used in another instance of your application, set the Build Output option in the Item tab to None.
    • While compiling a bitfile to run on an FPGA, it is important to keep the Build Output option in the Item tab set to Bitfile for the top-level FPGA VI until the initiation and transferring compilation steps are complete.

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