Table Of Contents

Language Integration in LabVIEW

Last Modified: February 12, 2016

You can use multiple programming languages to develop your application. How you integrate pieces of code written in different languages into your overall application depends on the language and the target you are integrating the code into.

The following table provides integration details for each language in LabVIEW.

Language Integration Details
G

You can call a VI from the following source documents:

  • Host VI—Create a subVI node by dragging the VI from the Project Files tab onto the diagram.
  • FPGA VI—Create a subVI node by dragging the VI from the Project Files tab onto the diagram.

You can also configure an FPGA VI as an Optimized FPGA VI to use G algorithms on an FPGA. Configuring the VI as an Optimized FPGA VI enables additional features, but also limits the palette to nodes and data types supported on an FPGA. When you drag an Optimized FPGA VI from the Software palette category onto the diagram, LabVIEW encloses the Optimized FPGA VI in an integration node.

You can call an optimized FPGA VI from the following source documents:

  • Host VI—Use an Optimized FPGA VI in an integration node to simulate your code before moving it to an FPGA.
  • FPGA VI—Use an Optimized FPGA VI in an integration node only inside a Clock-Driven Loop.
  • Multirate Diagram—Use an Optimized FPGA VI in an integration node.
  • Optimized FPGA VI—Create a subVI node by dragging the Optimized FPGA VI from the Project Files tab onto the diagram.
Multirate Dataflow

When you drag a Multirate diagram from the Source Code palette category onto the diagram, LabVIEW encloses the Multirate diagram in an integration node.

You can call a Multirate diagram from the following source documents:

  • Host VI—Use a Multirate diagram node to simulate your code before moving it to an FPGA.
  • FPGA VI—Use a Multirate diagram node only outside of a Clock-Driven Loop. Pass data between a Multirate diagram and the code inside a Clock-Driven Loop using FIFO references.
  • Multirate diagram—Create a subMRD node by dragging the Multirate diagram from the Project Files tab onto the diagram.
Clock-Driven Logic

You can call Clock-Driven Logic from the following source documents:

  • FPGA VI—Add Clock-Driven Logic directly to the diagram inside a Clock-Driven Loop, or create a subCDL node by dragging the Clock-Driven Logic document from the Project Files tab into a Clock-Driven Loop.
  • Clock-Driven Logic document—Create a subCDL node by dragging the Clock-Driven Logic document from the Project Files tab onto the diagram.
MathScript

You can integrate MathScript code only into a host VI. Use a MathScript Node to import existing MathScript code into your application or to develop your application using MathScript functionality.

C

You can integrate C code only into a host VI. Use a C Node to import existing C code into your application or to develop your application using C functionality.

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Note  

You must target documents to the same location before you can call a document from another document. For example, a host VI can only call other documents targeted to the host, and an FPGA VI can only call other documents targeted to the same FPGA.


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