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Choosing a Programming Language for Your Application

Last Modified: February 12, 2016

You can choose from several language options to develop your application. The purpose of the application and your programming preferences determine which language you should choose. For example, if you want your application to process data streams on an FPGA, use Multirate Dataflow to program your application.

Programming Languages for Host Applications

Certain tasks, like processing data, are well-suited for execution on the host because the host has fewer resource constraints than an FPGA.

You can use any of the languages in the following table to program an application that runs on the host.

Language When to Use Key Features
G
  • Processing and logging data on the host
  • Testing and simulating FPGA code during development
  • Deploying FPGA code
  • Full data type support
  • Full debugging capabilities
  • Extensive selection of nodes on the palette
  • Nodes for testing and deploying FPGA code, such as the Run FPGA Simulation node and the FPGA Host Interface nodes
MathScript
  • Processing data using MathScript syntax and functionality on the host
  • Integrating existing .m files into your design
  • Creating new .m files using user-defined MathScript functions
  • Syntax highlighting
  • Function completion
  • Debugging capabilities with probes and breakpoints
C
  • Processing data using C syntax and functionality on the host
  • Integrating existing C code into your design
  • Syntax highlighting
  • Function completion
  • Debugging capabilities with probes and breakpoints

Programming Languages for FPGA Applications

Some LabVIEW languages are designed specifically to help you program an FPGA application.

You can use any of the languages in the following table to program an application that runs on an FPGA.

spd-note-note
Note  

If you plan to implement your application on an FPGA, NI recommends that you use Multirate Dataflow or optimized FPGA VIs to design your application. Multirate Dataflow and optimized FPGA VIs allow you to program using floating-point numbers on the host and easily convert those floating-point data types to fixed-point for implementation on an FPGA. However, if you have experience programming for FPGAs and want complete control over optimization techniques, consider using Clock-Driven Logic to design your application.

Language When to Use Key Features
G

Use G on an FPGA for the following purposes:

  • Creating a top-level VI that contains your FPGA code
  • Integrating Multirate Dataflow into your FPGA application

You can also configure a G document on the FPGA, or FPGA VI, as an Optimized FPGA VI to use G algorithms on an FPGA. Configuring the VI as an Optimized FPGA VI enables additional features, but also limits the palette to nodes and data types supported on an FPGA.

Use Optimized FPGA VIs for the following purposes:

  • Easily viewing resource estimations for your code
  • Processing data using arrays and loops
  • Designing with floating-point data types on the host before converting to fixed-point data types for implementation on an FPGA

On an FPGA, G includes the following key features:

  • Full debugging capabilities
  • Clocks, I/O, and Data Exchange nodes and terminals for processing and transferring data on an FPGA

Optimized FPGA VIs include the following key features:

  • Full debugging capabilities
  • Resource estimation tools
  • Throughput analysis
  • 4-wire handshaking when called from Clock-Driven Logic
Multirate Dataflow

If you prefer to program using data streams and intend to process digital signals, consider using Multirate Dataflow to program for the FPGA.

Use Multirate Dataflow for the following purposes:

  • Designing programs for the FPGA with automatic handshaking and pipelining
  • Designing with floating-point data types on the host before converting to fixed-point data types for implementation on an FPGA
  • Processing streams of data at different rates without loops
  • Implementing transforms and filters easily
  • Integrating Optimized FPGA VIs into your FPGA application with automatic handshaking and buffer sizing. If you need to transfer data between multiple Optimized FPGA VIs, consider wiring them together on a Multirate diagram. The Multirate diagram automatically handles buffer sizing and handshaking between the Optimized FPGA VIs and can analyze whether those nodes can meet a throughput constraint.
  • Automatic buffer sizing
  • Automatic handshaking
  • Automatic pipelining options
  • Stream Manipulation nodes for modifying data streams
  • Signal Processing nodes for filter and transform implementation
  • Schedule tab for identifying throughput-limiting components of the diagram
Clock-Driven Logic

If you have experience programming for FPGAs and prefer to design your application at the lowest level, consider using Clock-Driven Logic to fully optimize your application.

Use Clock-Driven Logic for the following purposes:

  • Designing programs for the FPGA with complete control over throughput, clock rate, latency, handshaking, and resources
  • Implementing multiple clock domains
  • Integrating external VHDL code
  • Integrating optimized FPGA VIs into your FPGA application with manual handshaking
  • Full debugging capabilities
  • Xilinx IP nodes
  • Data Exchange, I/O, and Clocks nodes
  • High Throughput Math nodes

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