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Creating a Testbench to Test a Floating-Point Design

Last Modified: September 20, 2016

Use a testbench to test the output of your floating-point design and ensure the results are what you expect.

A testbench is typically a VI that provides simulated input values to your code and displays the output of the code on the panel.

The design of your testbench depends on the purpose and requirements of your application. For example, a testbench for a digital filter algorithm may need input samples that represent an RF signal, whereas a linear algebra algorithm might require input samples that represent a matrix.

Complete the following steps to create a testbench to test the output of your design:

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Note  

As you work through this procedure, refer to the Testbench Examples section below for an example of testbench code.

  1. From SystemDesigner, create a new VI on the host. The host can be a PC or a controller within your hardware device.
  2. Open the new VI and switch to the diagram.
  3. Add your floating-point design to the diagram as a subVI, Multirate Diagram node, or Optimized FPGA VI node, depending on which language you used to create your design.
    • To add a subVI or Multirate Diagram node to the diagram, drag the VI or Multirate Diagram from the Project Files tab onto the diagram.
    • To add an Optimized FPGA VI node to the diagram, select the Optimized FPGA VI from the Software palette category and place it on the diagram.
  4. Create code to generate input data that accurately represents the real data you expect the design to process.

    Testing with realistic input data increases the probability that your design will work properly with the real data you acquire from your hardware once you deploy to the target. Consider the following guidelines when configuring input data:

    • Create input values that span the full range of the real values that you expect to process. Otherwise, you might underestimate the necessary range of the fixed-point data types in your converted design.
    • Create input values that vary enough to test all operations within the design and accurately represent the type of data you expect to process. For example, in digital signal processing (DSP), a digital filter might require an input signal with broad spectral content to determine its frequency response, while a linear algebra algorithm might require an input matrix with a sufficient condition number.
    • For DSP, use Signal Generation nodes to generate and configure input signals for your design.
  5. Add any code to the diagram needed to process the output of the floating-point design and display the results of the processed data.

Testbench Examples

The following diagram shows a testbench VI that tests the Second Order IIR Filter - Float node. The nodes to the left of Second Order IIR Filter - Float provide input samples, and the nodes to the right of the Second Order IIR Filter - Float process the output. The testbench VI displays the data as graphs on the panel.

Search LabVIEW for the following installed lessons:

  • Algorithm Design and Testing
  • Fixed-Point Conversion

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