Table Of Contents

Write Memory (Clock-Driven Logic)

Last Modified: September 10, 2016

Writes to memory available on the FPGA target. You can use a target-scoped or VI-defined memory item to store data and access it from a different clock domain only if you implement the memory item using block memory. In this implementation, you can use only one writer node and one reader node for each memory item.

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reference in

A reference to a memory item.

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address

The location to write data in memory on the FPGA target. The valid address range depends on the requested number of elements you specify when creating the input memory item. For example, if you specify a requested number of elements of 65536, the valid address range is 0–65535. If address exceeds the address range, the data will not be written to memory.

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data

The data to write to the memory on the FPGA target. Data may only be written if the input memory item has interface B set to Write.

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reference out

A reference to a memory item.

Where This Node Can Run:

Desktop OS: none

FPGA: All devices


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