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LTE DL Channel Encoder (Clock-Driven Logic)

Last Modified: September 10, 2016

Provides an LTE Downlink Channel Encoding block for the 3GPP TS 36.212 v9.0.0 Multiplexing and channel coding specification.

In the Item tab, click Configure Xilinx IP to configure inputs and outputs for this node.

Need License: Yes

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Where This Node Can Run:

Desktop OS: none

FPGA: All devices


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