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High Throughput Polar to Rectangular (Clock-Driven Logic)

Last Modified: September 10, 2016

Converts polar coordinates to rectangular coordinates. You must specify the phase of the polar coordinates in pi radians, which use fewer FPGA resources than radians. To convert a radian value to pi radians, multiply the value by pi.

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magnitude

Magnitude.

This input supports only the fixed-point data type.

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phase

Phase in pi radians, which use fewer FPGA resources than radians.

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Tip  

If you have a value in radians, multiply that value by pi before wiring the value to this input.

This input supports only the fixed-point data type.

Input Coercion

The CORDIC algorithm represents phase internally as a signed fixed-point number with a 1-bit integer word length. The word length of phase must be less than or equal to 64 bits. If you wire a value to phase that has a fractional word length greater than 63 bits, this node rounds off the lower bits to achieve a fractional word length of 63 bits. For example, if you wire a fixed-point data type with a configuration of I60<-5, 55> to phase, this node coerces the configuration to be U58<-5, 53>.

If you wire a fixed-point data type to phase with a fractional word length greater than 63 bits and an integer word length less than -62 bits, this node coerces the configuration to be I1<-62, 63> if the data type is signed. If the data type is unsigned, the coerced configuration is U1<-62, 63>.

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input valid

A Boolean that specifies whether the next data point has arrived for processing. Wire the output valid output of an upstream node to this input to transfer data from the upstream node to this node.

TRUE The data point is valid and can be processed.
FALSE The data point is not valid.
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ready for output

A Boolean that specifies whether downstream nodes are ready for this node to return a new value. Use a Feedback Node to wire the ready for input output of a downstream node to this input of the current node.

True The downstream node is ready for the next data point.
False The downstream node is not ready for the next data point.
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Note  

If this input is False during a given cycle, output valid returns False during that cycle.

Default: TRUE

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x

X value of the rectangular coordinates.

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y

Y value of the rectangular coordinates.

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output valid

A Boolean that indicates whether this node has computed a result that downstream nodes can use. Wire this output to the input valid input of a downstream node to transfer data from the node to the downstream node.

True The node has computed a result that downstream nodes can use.
False This node has not computed a result that downstream nodes can use. Any data output returns an undefined value. The undefined value returned by a data output may differ between simulation and hardware.
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ready for input

A Boolean that indicates whether this node is ready to accept new input data. Use a Feedback Node to wire this output to the ready for output input of an upstream node.

True The node is ready to accept new input data.
False The node is not ready to accept new input data.
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Note  

If this output returns False during a given cycle, this node discards any data that other nodes send to this node during the following cycle. This node discards the data even if input valid is True during the following cycle.

Where This Node Can Run:

Desktop OS: none

FPGA: All devices


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