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High Throughput Multiply (Clock-Driven Logic)

Last Modified: May 15, 2017

Computes the product of two specified values (x and y).

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x

Multiplicand.

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y

Multiplicator.

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operation overflow

A Boolean that indicates whether the theoretical computed value exceeds the valid range of the output data type.

TRUE The theoretical computed value exceeds the valid range of the output data type.
FALSE The theoretical computed value does not exceed the valid range of the output data type.
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x*y

Product of x and y.

Diminished Clock Rate with Complex Fixed-Point Data Types

If you wire complex fixed-point data types to both inputs of High Throughput Multiply, you may experience a reduced clock rate at compile time. If you cannot achieve your desired clock rate using this node, first try enabling the Four Wire option in the Item tab to implement handshaking. If cannot achieve your desired clock rate using handshaking, implement the same logic using Xilinx IP nodes.

Where This Node Can Run:

Desktop OS: none

FPGA: All devices


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