Table Of Contents

High Throughput Divide (Clock-Driven Logic)

Last Modified: September 10, 2016

Computes the quotient of two numbers.

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x

Dividend.

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y

Divisor. If the value of y is 0, overflow occurs in the x/y output terminal.

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input valid

A Boolean that describes whether the next data point has arrived for processing. Wire the output valid output of an upstream node to this input to transfer data from the upstream node to this node.

TRUE The next data point has arrived for processing.
FALSE The next data point has not arrived for processing.
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ready for output

A Boolean that defines whether downstream nodes are ready for this node to return a new value. Use a Feedback Node to wire the ready for input output of a downstream node to this input of the current node.

True Downstream nodes are ready for this node to return a new value.
False Downstream nodes are not ready for this node to return a new value.
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Note  

If this input is False during a given cycle, the output valid output returns False during that cycle.

Default: True

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operation overflow

A Boolean that indicates whether the theoretical computed value exceeds the valid range of the output data type.

TRUE The theoretical computed value exceeds the valid range of the output data type.
FALSE The theoretical computed value does not exceed the valid range of the output data type.
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x/y

x divided by y.

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output valid

A Boolean that indicates whether this node has computed a result that downstream nodes can use. Wire this output to the input valid input of a downstream node to transfer data from the node to the downstream node.

True The node has computed a result that downstream nodes can use.
False This node has not computed a result that downstream nodes can use. Any data output returns an undefined value. The undefined value returned by a data output may differ between simulation and hardware.
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ready for input

A Boolean that indicates whether this node is ready to accept new input data. Use a Feedback Node to wire this output to the ready for output input of an upstream node.

True The node is ready to accept new input data.
False The node is not ready to accept new input data.
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Note  

If this output returns False during a given cycle, this node discards any data that other nodes send to this node during the following cycle. This node discards the data even if input valid is True during the following cycle.

Avoiding Overflow in x/y

If you leave Auto Adapt enabled for the Precision configuration of this node, overflow can still occur in the x/y output for non-zero values of y if both of the following conditions are true:

  • x = -2iwlx - 1
  • y = -2iwly - wly

where wl refers to the word length of an input and iwl refers to the integer word length of an input.

Complete the following steps to avoid overflow in the situation described in the previous section and for any non-zero value of y:

  1. Select this node on the diagram.
  2. Disable Auto Adapt for the Precision option on the Item tab. When you disable Auto Adapt, you also disable the Auto Adapt Options button.
  3. Configure the Precision, Overflow, and Rounding for the node.

After you complete these steps, LabVIEW no longer adjusts the fixed-point configuration of x/y automatically. Therefore, if you change the fixed-point configuration of the x or y and still want to avoid overflow for any non-zero value of y, re-enable Auto Adapt on the Item tab. Then, complete the same steps to specify word length and integer word lengths.

Effect of Rounding on x/y

The fixed-point behavior for this node uses a rounding mode that truncates the output value towards zero. This mode rounds the output value down to the nearest value that the output type can represent. If the value is positive, LabVIEW truncates the value. If the value is negative, LabVIEW deletes the least significant bits (LSBs) and adds the sign bit to the remaining LSBs, provided at least one of the deleted bits differs from 0.

Where This Node Can Run:

Desktop OS: none

FPGA: All devices


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